Power modules are being developed with the aim of increasing power output. Achieving this aim requires increased current density in power modules. However, at high current densities, power modules can degrade as a result of electromigration, which is a phenomenon where atoms move due to momentum transfer between conducting electrons and metal atoms. In addition, atoms are also moved by mechanical stress gradients and temperature gradients, so it is necessary to consider the combined effects of electrical, thermal, and mechanical stress. This report describes an electromigration analysis of solder joints for power modules. First, we validated our numerical implementation and showed that it could reproduce the distributions of vacancy concentrations and hydrostatic stress that were almost the same as those in previous studies. We then describe the effects of electromigration in a single solder joint. Due to the appearance of plastic and creep strains, the rate of increase in vacancy concentration was very slow and inelastic strain grew at an increasing rate. This result indicates that inelastic properties may strongly affect electromigration-induced degradation. Next, we present results for the solder joint with a SiC device and substrate. A current crowding appeared at the edge of the solder joint, and a vacancy concentration gradient was generated in not only the thickness direction but also the longitudinal direction. The absolute value of vacancy concentration increased significantly at the edge and did not reach a steady state even after a long time. These results indicate that peripheral components may strongly affect the electromigration-induced degradation. In addition, we modeled the behavior of metal atoms passing through the interface of the solder joint and simulated the growth of the intermetallic layer by electromigration.

Power semiconductors and modules are basic components of electrical infrastructure and are currently widely used in applications such as power conversion devices, industrial equipment, railways, and automobiles. Power modules are being developed with the aim of downsizing and increasing power output. With the larger current densities and higher operating temperatures associated with downsizing and increasing power output, degradation of power modules can occur as a result of electromigration. Electromigration is a phenomenon where atoms move due to the momentum transfer between conducting electrons and metal atoms. In addition, atoms are also moved by mechanical stress gradients and temperature gradients, so it is necessary to take into consideration the combined effects of electrical, thermal, and mechanical stress. In this report, we describe an electrical-thermal-mechanical coupled analysis of electromigration in a bonding wire of a power module. First, the analysis is validated under the condition that the displacement of the wire surface is fixed. The distributions of vacancy concentrations and hydrostatic stress are almost equal to those in previous studies. Next, we present the influences of current density, temperature, and the displacement constraint on electromigration in a wire with a simplified shape. The analysis results confirm that the plasticity and creep should be taken into consideration in a bonding wire. This also confirm that vacancy concentration increase more rapidly by changing the displacement of the wire surface from the fixed condition to the free condition. Finally, we present analysis results for a bonding wire with the actual shape found in power modules. In this wire, a local concentration peak appear in the electrode terminal. The analysis results reveal that electromigration may affect not only void formation but also other failure phenomena in the bonding wire of power modules.

Silicon carbide (SiC) has attracted increasing attention as a material suitable for use with high breakdown voltages and at high temperatures. The effects of residual stress and thermal stress on the electrical properties are therefore a matter of growing concern. To analyze the effects, multi-physics simulation is required. The aim of this study is to present an evaluation method for SiC power modules by electro-thermal-stress coupled analysis. In this analysis, we investigate the relationship among mechanical stress, temperature, and electrical resistance in 4H-SiC MOSFET. To investigate the relationship, we used a four-point bending system that is capable of applying uniaxial stress to the SiC device. We prepared two kinds of test specimens with the uniaxial stress direction of four-point bending coinciding with the 〈112̄0〉 and 〈11̄00〉 direction of SiC. To associate the four-point bending load with the stress components in the SiC device, the four-point bending test was simulated by the finite element method. Tensile or compressive load was applied to two types of test specimens, and the internal stress of the SiC device was determined. To determine the internal stress during operation and mounting, the simple module model was also simulated by the structural analysis method. The internal stress was simulated from mounting temperature to the operating temperature. An electrical circuit and thermal circuit were constructed for the DC-DC converter in the above-described module for the coupled analysis method. The relationship among mechanical stress, temperature, and electrical resistance was incorporated into the additional resistance of the MOSFET in the electrical circuit. When an isotropic stress from −500 to 1400 MPa was applied with the SiC under the oxide film in the one parallel DC-DC converter, the change in the power conversion efficiency was about 0.16%. This indicates that our proposed method is a useful simulation method for SiC power modules.

Power semiconductor devices such as MOSFET/IGBT and PiN diodes are widely used as basic components for supporting infrastructure in the field of electronics, including in power conversion, industrial equipment, railways, and automobiles. Recently, increasing attention has been paid to silicon carbide (SiC) as a wide-band-gap semiconductor suitable for use in power devices with low loss and high breakdown voltage. However, basic knowledge of the material properties and reliability of SiC devices, and particularly the influence of mechanical stress on device characteristics, is still incomplete. In this paper, we evaluated the effect of mechanical stress on the electrical characteristics of SiC devices. In order to investigate the effect of stress on the SiC device characteristic, we propose a simple evaluation method using four-point bending, which is a classical method capable of applying uniaxial stress to a device. With this method, we evaluated the stress in a SiC device using residual stress measurement by Raman spectroscopy and stress simulation based on the finite element method. Our proposed experimental method is as follows. First, the SiC device was bonded with AuGe solder to a metal plate [phosphor bronze; Young’s modulus: 105 GPa; Poisson’s ratio: 0.33; dimensions: 100 mm (W) × 12 mm (L) × 2 mm (T)], and aluminum wire (wire radius: 200 μm) was also bonded to the device. Second, the prepared device was placed on the specially designed four-point bending apparatus for mechanical stress experiments. Finally, the sample was bent in compression or tension in the in-plane direction by the four-point system. The SiC device was subjected to compression or tensile stress via the metal plate. The electrical characteristics of the SiC-MOSFET were measured with a curve tracer in our proposed system. I d − V ds characteristics changed linearly as stress was applied to the device. As a result, the on-resistance was increased by 7.6% by applying a tensile stress of 300 MPa and was decreased by 1.0% by applying a compressive stress of 100 MPa at room temperature, respectively. A power device circuit with multiple chips was also simulated by SPICE based on the experimental results to confirm the effects of stress on SiC devices in a power module. Simulated MOSFET model contains stress factors obtained from experimental results. The circuit was simulated by electro-thermal coupled analysis using a one-dimensional model of the electric circuit and thermal circuit constructed in SPICE. The results show that the proposed method is powerful simulation method for power device design.

Non invasive fractional flow reserve derived from CT coronary angiography (CT-FFR) has to date been typically performed using the principles of computational fluid analysis in which a lumped parameter coronary vascular bed model is assigned to represent the impedance of the downstream coronary vascular networks absent in the computational domain for each coronary outlet. This approach may have a number of limitations. It may not account for the impact of the myocardial contraction and relaxation during the cardiac cycle, patient-specific boundary conditions for coronary artery outlets and vessel stiffness. We have developed a novel approach based on 4D-CT image tracking (registration) and structural and fluid analysis based on one dimensional mechanical model, to address these issues. In our approach, we analyzed the deformation variation of vessels and the volume variation of vessels to better define boundary conditions and stiffness of vessels. We focused on the blood flow and vessel deformation of coronary arteries and aorta near coronary arteries in the diastolic cardiac phase from 70% to 100 %. The blood flow variation of coronary arteries relates to the deformation of vessels, such as expansion and contraction of the cross-sectional area, during this period where resistance is stable, pressure loss is approximately proportional to flow. We used a statistical estimation method based on a hierarchical Bayes model to integrate 4D-CT measurements and structural and fluid analysis data. Under these analysis conditions, we performed structural and fluid analysis to determine pressure, flow rate and CT-FFR. Furthermore, the reduced-order model based on fluid analysis was studied in order to shorten the computational time for 4D-CT-FFR analysis. The consistency of this method has been verified by a comparison of 4D-CT-FFR analysis results derived from five clinical 4D-CT datasets with invasive measurements of FFR. Additionally, phantom experiments of flexible tubes with and without stenosis using pulsating pumps, flow sensors and pressure sensors were performed. Our results show that the proposed 4D-CT-FFR analysis method has the potential to accurately estimate the effect of coronary artery stenosis on blood flow.

The Cu through-hole is a structure of electroplated Cu thin film, which penetrates the substrate. Because of the mismatch of the thermal expansion coefficient between the Cu thin film and the substrate along the thickness direction, thermal strain occurs repeatedly at the Cu through-hole part with the variation of temperature. As a result, the thermal fatigue failure of Cu through-hole part is one of the failure modes of the substrate. In this study, the effects of thermal cycle conditions on the thermal fatigue life of the substrate with Cu through-hole were investigated by thermal cycle tests and Finite Element Method (FEM)-based analyses. Thermal cycle tests of the substrate with Cu through-hole were conducted under different thermal conditions. The effects of dwell time, temperature range and maximum temperature were investigated. Among these factors, the maximum temperature shows the greatest influence on the thermal fatigue life of Cu through-hole part. FEM-based thermal cycle analyses were also carried out to understand the effects of thermal cycle conditions. The glass cloth structures of the substrate should be considered in the analyses, because their rigid properties probably affect the generation of the failure at the through-hole part. In this study, glass cloth structures were modeled by taking advantage of a homogenization method. On the other hand, the inelastic constitutive model of the electroplated Cu thin film was introduced in the analyses in order to describe the creep deformation during the dwell process of thermal cycles. The inelastic strain range of the Cu through-hole during thermal cycles was calculated from the analysis results and the effectiveness of the Coffin-Manson law was evaluated. The results showed that the fatigue life prediction using the Coffin-Manson model was effective in the range of the same substrate thickness and the same maximum temperature. Additionally the influences of material model and material constants of epoxy resin were investigated to expand the range of application of the fatigue life prediction.

Continuing improvements in both capacity and miniaturization of electronic equipment such as solid state drives (SSDs) are spurring demand for high-density packaging of NAND-type flash memory mounted on SSD printed circuit boards. High-density packaging leads to increased fatigue failure risk of solder joints due to the decreased reliability margin for stress. We have developed a failure precursor detection technology based on fatigue failure probability estimation during use. This method estimates the cycles to fatigue failure of an actual circuit by detecting broken connections in a canary circuit (a dummy circuit of daisy-chained solder joints). The canary circuit is designed to fail earlier than the actual circuit under the same failure mode by using accelerated reliability testing and inelastic stress simulation. The statistical distribution of the strain range of solder joints can be provided by Monte Carlo simulations based on the finite element method and random load modeling. A feasibility study of the failure probability estimation method is conducted by applying the method to a printed circuit board on which a ball grid array (BGA) package is mounted using BGA solder joints. The proposed method is found to be useful for prognostic health monitoring of solder joint’s fatigue failure.

There is high demand for fatigue life prediction of solder joints in electronic packages such as ball grid arrays (BGAs). A key component of fatigue life prediction technology is a canary device, which warns of the impending risk of failure through loss of function before other important parts become severely impaired. In a BGA package, thermal fatigue of solder joints normally starts from the solder joints at the outermost part of the package. This can be taken advantage of by using the outermost solder joints as canary devices for detecting the degree of cumulative mechanical fatigue damage. To accurately estimate the lifetimes of other functional solder joints, it is essential to understand the relationship between the fatigue lives of canary joints and other functional joints. Damage path simulation is therefore proposed for predicting the crack propagation in solder joints on electronic packages through numerical simulation. During the process of designing the layout of canary joints and other joints, it is very useful to know not only the relationship between the fatigue lives of the canary and other joints, but also the path of crack propagation through all joints. This paper presents a method for estimating the relationship between the fatigue lives of canary joints and other joints by using damage path simulation. Some BGA packages mounted on a printed circuit board are modeled to demonstrate the process of estimating the lifetime of each joint under thermal cycle loading. A large-scale finite element model is used to accurately represent the geometrical properties of the printed circuit board and package. Both crack initiation and crack propagation processes can be simultaneously evaluated by modeling all of the solder joints on each package. The results show that damage path simulation and large-scale modeling are useful for determining the layout of canary joints in electronic packages.

Health monitoring technologies, which can evaluate the performance degradation, load history and degree of fatigue, have the potential to improve the maintenance, the reliability design method and the availability in improper use conditions of electronic equipment. In this paper, we propose a method to assess the cooling performance degradation and load history of printed circuit boards in electronic equipment by use of a hierarchical Bayes model based on CAE (Computer Aided Engineering) results of thermal stress simulation and experiment data from actual measurements. We applied this method to a notebook PC that can monitor the device load factor and revolution number of cooling fan. It is shown that this method can estimate the temperature and deformation distribution of the printed circuit board from monitoring variables through latent variables such as thermal dissipation of the device and thermal boundary condition by use of the hierarchical Bayes model. And it is confirmed that the statistical load assessment concerning thermal cyclic load and the maximum load distribution can be conducted using the estimated temperature and deformation data. We verified that the cooling performance degradation can be assessed, if the temperature difference per unit thermal value between two suitable points on the printed circuit board can be obtained. Furthermore, we attempted the estimation method based on the hierarchical Bayes model to dynamic load assessment such as cyclic drop impact for PCB. The assessment method for the strain range distribution of the solder joints on the PCB was conducted to lead to the conservative results for reliability design. It is concluded that the proposed method can be effective to assess the field load history and cooling performance degradation.

In order to utilize a numerical simulation on a product development for electronic equipment, not only the simulation techniques themselves, but the application technologies of the simulation in the product design, were examined. The design process of electronic equipment was categorized into four stages, which were a concept, a function, a layout and a parameter design. Each design stage consists of a specifying that a human decide the specification for the next stage and a verification whether the specification satisfy the previous stage requirements. The specifying and the verification are conducted over and over again. Numerical simulation is corresponded to the verification and is used to accelerate this iteration instead of experiments. The examples of numerical simulation corresponding to these four verifications were shown in the present paper. There are few examples in last two type of simulation. The progress of the numerical technology for function and concept verification is expected. The product development process requires not only numerical simulation based on physics but also statistical approach.

In this paper, the influence of the interface debonding area between the molding material and the metal frame on the fatigue reliability at die-mount solder joints in plastic IC packages was studied by means of large-scale finite element analyses. There are several factors causing the interface debonding between the molding material and the metal frame, such as manufacturing process, moisture absorption and deformation under field conditions. The debonding will change the structural stiffness of the packages and deformation shape during a thermal or mechanical load. Therefore, it is a critical issue for fatigue reliability. In this paper, three-dimensional large-scale finite element analysis is used for evaluating the influence of the debonding area on fatigue reliability under thermal cycling. The die-mount solder considered is the high-temperature solder 5Sn/95Pb. which is described by the nonlinear kinematic hardening model of Armstrong and Frederick in the finite element constitutive model. From the result of stress analyses, the debonding area has a large influence on inelastic strain, which is related to fatigue reliability. Large-scale finite element analysis is capable of providing useful guidance for structural design and material selection of plastic IC packages.

In the present study, the robust thermal design of a power device package was accomplished using thermal conduction calculation, design of experiment, response surface method and Monte Carlo simulation. Initially, the effects of the design parameters on the solder strain were examined in terms of the thermal expansion difference as a result of unsteady thermal conduction simulation. From the factorial effects of design parameters, the design proposals were screened. Then, robustness of the thermal resistance was evaluated for the three design proposals obtained. The thermal resistances were calculated by solving the steady thermal conduction equation under the design of experiment conditions. The solder thickness, the substrate thickness, and the cooling fin performance were considered as the fluctuation factors, assuming the error associated with manufacturing process. Using a response surface method, the values of thermal resistance were expressed as a function of the design variables. The variances of the thermal resistance were examined based on Monte Carlo simulations. Related to the cooling fin design, the Pareto line showing the trade-off relation between the fin dimension and the fan velocity was obtained. By repeating the Monte Carlo simulations, the Pareto solution was calculated so that the thermal resistances satisfy the criteria in the position of 95 percrntile of the thermal resistance variation. Under the same flow velocity conditions, the fin dimensions become about 10% higher compared to the case where the manufacturing error was not taken into account. By carrying out the thermal design following this Pareto line, even if the manufacturing error was taken into consideration, the thermal resistance could satisfy the desired value.

Fatigue life prediction of solder joints is one of the most important areas of research in the development of reliable electronic packages. Recent trends in electronic package development indicate a shift toward smaller solder joints and larger package sizes, and temperature changes under field conditions are also becoming greater. Since reliability design of solder joints has become severer, the estimation of the crack propagation is becoming important like the estimation of the crack initiation. In the present study, a new method of estimating the crack propagation, which is based on finite element analysis without geometrical crack model, was examined, in order to ensure suitability for practical use in electronic package design. On the basis of a damage model assumed for Sn-37Pb solder, the new method called ‘damage path simulation’ was verified for solder joints in QFP (Quad Flat Package). In the case of solder joints of the gull-wing type, fatigue cracks are commonly initiated from the upper surface of the solder fillet, and propagated in the vicinity of the interface with the outer lead. It was clear that the extension of the damage path showed good agreement with the behavior of crack propagation observed in the actual thermal cycle tests. Damage path extension from a pointed end of outer lead is also simulated simultaneously with that from the upper surface of the solder fillet, and both damage paths were finally combined at a gap between outer lead and printed circuit board. The advantage of the present method is especially evident when the fatigue cracks were initiated from two or more regions. From the results of this study, it was concluded that the estimation of the crack propagation in solder joints based on the present method is satisfactory for engineering purposes.

In order to improve electronics packaging design, it is important to evaluate cooling performance and reliability of the electronics packaging structure. To that end, it is necessary to predict the temperature, deformation, and stress distribution of the package under field conditions. In the case of a packaging structure comprising a flip-chip ball grid array (FC-BGA) package, a heat spreader, thermal grease, a cooling structure, solder joints, and a motherboard, an increase in the contact thermal resistance may occur, depending on the interface contact condition between the cooling structure and the heat-spreader due to the thermal deformation of the package. Contact thermal resistance problems involve the interactive relationship of the thermal and stress distribution. A coupled thermal-stress analysis, with consideration of the time-space variation of contact thermal resistance, was conducted to duplicate the behavior of temperature, deformation, and stress distributions of a FC-BGA package under field conditions. It was found (1) that the average contact thermal resistance across the interface between the heat-spreader and the plate fin, which was predicted by the coupled thermal-stress analysis, increased compared to that in the case of uniform contact pressure, and (2) that the contact thermal resistance will vary depending on the deformation mode, such as convex upward and downward, due to heat dissipation during field conditions. In addition, a reliability prediction method for thermal fatigue failure of solder bumps based on coupled thermal-stress analysis and statistical and probabilistic methods was proposed in order to select a suitable packaging solution at an early stage of design.