The design and development of reliable 3D integrated systems require high performance interconnects, which in turn are largely dependent on the choice of filler materials used in through-silicon vias (TSVs). Copper, tungsten, and poly-silicon have been explored as filler materials; however, issues such as thermal incompatibility, electromigration, and high resistivity are still a bottleneck. In this paper, we investigate single-walled carbon nanotube (CNT) bundles as a prospective filler material for TSVs and have provided an analysis of CNT based TSVs for package and chip interconnects. The interconnects are fundamental bottlenecks to achieving high performance and reliability. We have provided electrical modeling and performed simulations on TSVs with copper and carbon nanotubes. The results from the CNT based TSVs were greatly superior to those from the conventional vias with copper.

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