Silicon nanowire transistors are thought to be ideal transistor devices due to electrostatic control of the gate, and the International Roadmap for Devices and Systems has indicated that arrays of these devices are possible for future transistor devices. Nonequilibrium phonon transport due to self-heating in silicon nanowire transistors affects performance in the areas of carrier mobility, speed, aging, and thermal failure. Existing methods for phonon transport modeling range in fidelity and flexibility. Direct quantum or atomic simulations offer high fidelity with reduced flexibility while Monte Carlo methods offer enhanced flexibility for reduced fidelity. An enhanced statistical phonon transport model (enhanced SPTM) is presented to fill the gap between Monte Carlo and direct atomic methods. Application of the enhanced SPTM to one-dimensional (1D) simulations of silicon nanowire devices illustrates production of design relative information. Simulation results indicated an excess build-up of up to 14% optical phonons beyond equilibrium values giving rise to transient local temperature hot spots of 60 Kelvin in the drain region. The local build-up of excess optical phonons in the drain region has implications on performance and reliability.The enhanced SPTM is a valid engineering design tool for evaluating the thermal performance of silicon nanowire transistor designs. The phonon fidelity of the enhanced SPTM is greater than Monte Carlo and the Boltzmann Transport Equation and the length-scale and time-scale fidelity of the enhanced SPTM is better than direct atomic simulation.