Regional Stiffness Reduction Using Lamina Emergent Torsional Joints for Flexible Printed Circuit Board Design

Recent years have seen significant advances in flexible printed circuit board (PCB) technology. Flexible electronics are used in a wide array of industries, including aerospace, automotive, consumer electronics, and medical devices [1]. Increasingly demanding design requirements include flexibility, manufacturability, and fatigue life. These requirements often compete and lead to design tradeoffs.

Flexible electronics research and development generally focus on developing and applying materials with low stiffness. Material properties are global and affect the entire PCB; so these tradeoffs can cause undesirable behavior in some parts of the device. In particular, fatigue due to repeated deflection of components and their connecting joints can lead to failure [2]. It is desirable to limit the strain on components and connecting joints to increase the service life of the device.

In addition to material selection, increased flexibility can also be achieved using geometry and boundary conditions [3]. Compliant mechanisms are devices that achieve their motion from deflection of flexible components, and they have been used in electrical connectors to improve performance and reliability [4]. They have also been used to protect components from stresses due to impact [5].

This paper presents an approach for reducing stiffness regionally using principles of compliant mechanisms to design for flexibility based on geometry. Surrogate hinges composed of arrayed lamina emergent torsional (LET) joints are used to introduce regions of flexibility while keeping areas of rigidity in a PCB made with a stiff substrate. The approach enables electronic components to be attached to rigid sections of the PCB while facilitating flexibility elsewhere.

Various technologies exist for the design of flexible PCBs. These technologies provide inherent tradeoffs compared to traditional rigid PCBs, which are often made with a copper conductive layer on a flame retardant fiberglass substrate.

Similar to traditional rigid PCBs, flexible printed circuits include an electrically conductive coating adhered to an insulating substrate [1]. A wide variety of flexible conductors have been used and proposed, including metallic films [6], eutectic indium/gallium [7], percolated networks of conducting nanowires [8], polymers [9], and graphene [10]. Flexible substrates such as plastic films [11], metal foils [12], and textiles [13] have also been used and proposed. Using flexible materials results in a global reduction in stiffness, which leads to tradeoffs in other properties (such as electrical conductivity or manufacturability).

The two main failure modes for flexible electronic devices are crack propagation and delamination [14,15]. Failures are generally more common in the conductive layer than the substrate because the conductive layer must be optimized for things other than just mechanical strain (such as electrical conductivity) and it is farther away from the neutral bending axis [16]. In addition, components mounted in a flexible circuit experience strain at the mounting surface, either in compression (on the inside of the bend) or tension (outside of the bend), which can cause failure in the components [17,18]. Figure 1 illustrates the stress that is applied when flexible circuit boards are deflected. The effects of fatigue and high stress on electronic components have been studied [19,20], and it is beneficial to reduce the fatigue and stress applied to these components.

Current solutions to this problem include adding stiffeners to flexible circuit boards and producing multilayer printed circuit boards that include layers of flexible and rigid materials that are cut to allow for regions of flexibility and rigidity. Both of these approaches add cost and manufacturing complexity. They are also difficult to scale to the microscale. Designing geometry that can add flexibility in specific regions while keeping others rigid could prevent high stresses from damaging components.

Flexible PCBs are fabricated in a plane and can exhibit motion out of their fabrication plane, and they can be categorized as lamina emergent mechanisms. The field of compliant mechanism provides approaches for designing robust lamina emergent mechanisms that can be fabricated on a planar sheet [21]. Surrogate hinges (also known as surrogate folds) are a class of mechanism that uses compliant members to achieve a hinge-like motion. Various geometries for surrogate hinges have been developed [22] and evaluated for different loading conditions [23]. The LET joint [24] is one such geometry that transforms an overall deflection in bending to torsional deflection in its legs (see Fig. 2(a)). Various geometries [25,26] and applications [27] have been proposed.

Lamina emergent torsional joints can also be arrayed in series and parallel (see Fig. 2(b)). This allows designers to use several LET joints to further reduce the stiffness.

To investigate the approach of using arrayed LET joints to reduce stiffness in printed circuit boards, the stresses were modeled analytically and using finite element analysis (FEA). These models were compared, and a prototype was constructed and tested.

Analytical and FEA models were developed and compared to aid engineers in developing suitable geometry to implement these joints in a design application. Sections 3.1.1–3.1.3 describe these models.

An analytical model was developed based on work done by Jacobsen et al. [24], where a single LET joint is analyzed (see Fig. 3). Figure 3(b) shows the parameters referenced in the equations below.

where M is the moment on the joint from the applied angular deflection θ, and k_eq is an equivalent spring constant based on a combination of the individual pseudo spring constants in the joint (k_1–6 in Fig. 3(a)). Figure 4 shows the applied angular deflection θ that induces moment M.

These equations provide the maximum nominal shear stress in the torsion bar, the maximum shear stress occurs at the ends of the torsion bar depending on the stress concentration factor. A filet radius can be used at this junction to reduce the stress concentration. Although such filets naturally occur when using most manufacturing processes, it is prudent to define a radius to ensure an acceptable radius is maintained. Determining theoretical stress concentration factors depends on geometry and loading condition, and can be determined by finite element analysis when using a sufficiently refined mesh or using resources for similar geometry [29]. Material properties reduce the stress concentration factor from the theoretical stress concentration factor. These affects are well defined in the literature and thus are not described further here.

These equations assume a moment loading, but other loading conditions can lead to parasitic motions, particularly under tension and compression loading. This phenomenon and strategies for avoiding this are discussed in more detail in other work [30,31].

The maximum shear stress can be determined by applying the appropriate stress concentration factor to the shear stress result.

To verify the analytical model of the LET joint array in FEA, various m × n arrays of LET joints (with m being the number of LET joints in parallel and n being the number of LET joints in series) were modeled and then deflected to an angular displacement of 30 deg. The dimensions and material properties of these arrays are listed in Table 1. ANSYS Parametric Design Language was used to perform the analysis. Solid186 elements were used to model the torsional and bending members, and Beam188 elements were used to model the rigid regions at the ends of the design. The model was meshed into about 188 elements per torsional member. Because of the large deflection of the structure, a nonlinear solver was used.

The shear stress from the FEA solution was compared with the analytical shear stress given in Eq. (14). Stress concentration effects in the FEA solution were minimized by recording the maximum nominal stress at half of the torsion member length and by including filets in the model as shown in Fig. 6. The comparison of the two models is presented in Fig. 7 with the relative error included. In all cases, the difference was within 8%. Only results for m = 1 arrays are plotted since the stress is independent of the number of joints in parallel (see Eq. (14)). Arrays with m = 2 were also evaluated and produced results nearly identical to the m = 1 case. A main source of error is the assumptions that members were loaded in pure tension and bending and that all other components were rigid.

The verified models in Sec. 3.1 facilitate the design of electronic devices with regions of flexibility and rigidity. One such design was prototyped and tested to investigate the feasibility of using arrayed LET joints as a means of introducing flexibility in rigid printed circuit boards.

Figure 8 shows the device that was constructed to demonstrate this concept in practice. The prototype is a folding solar array with the solar panels electrically connected in series with traces in the LET joints. The device is designed to fold 180 deg and stow in a backpack. The dimensions and material properties [32] of the hinge are given in Table 1. A detail view of the LET joint array with exposed copper traces is shown in Fig. 8(c). The analytical and FEA models for this design produced predicted values of 10.7 MPa and 10.1 MPa for the shear stress, respectively, resulting in a relative error of 5.96%.

The prototype demonstrated the ability to deflect 180 deg without mechanical failure or degradation of electrical performance.

To simulate repeated use of the device, a fatigue testing device was customized to accommodate the hinge portion of the prototype (see Fig. 9). Two copies of the hinge were produced and tested. On each hinge, two electrical traces were routed through the LET joints on the top, and two traces were routed through the LET joints on the bottom. A microcontroller (Arduino Uno with ATmega328P) was connected to each LET joint with a resistor in series and used as a voltage source and measurement device. The fatigue tester was used to deflect the board 180 deg with a natural bend radius of about 5 mm at a rate of 20 cycles per minute. Voltage samples were taken at a rate of 140 samples per minute to detect if conductivity was lost.

The samples were deflected for 100,000 cycles. After the test, the samples were inspected for mechanical failure. The resistance of each trace across the hinge was also measured before and after testing. Resistance measurements are shown in Table 2.

As shown in Table 2, the resistance change of the traces was only 1.9% after 100,000 cycles. As no cracking or other mechanical failure of the traces was observed, this small increase in resistance is likely due to increased contact resistance from dust particles settling on the surface. These measurements show that there was no mechanical failure in any of the traces resulting from fatigue of the material.

To demonstrate how this technique could be used to manufacture stowable PCBs, a prototype origami-like structure was designed and fabricated from a single sheet of copper-clad FR-4 fiberglass. An origami map fold [33] with two degree-four vertices [34] was selected.

Figure 10(a) shows the original origami fold pattern. Labels A, B, and C show the order of the folds. The structure is first folded in half on fold A. It is then folded in thirds on folds B and C. Figure 10(b) shows the regions where flexibility is to be added to facilitate folding. Figure 10(c) shows the surrogate hinge regions to be optimized. Labels α, β, and γ show the three separate optimization regions. When the structure is folded, α regions are folded first, so they should have a small bend radius when folded. β and γ regions are folded next, with γ regions folded around β regions. β regions, then, should have a small bend radius, and γ regions should have a larger bend radius to fold around the outside of the β folds.

An optimization routine was employed to design the geometry of the surrogate hinge structures. Mixed integer programming was implemented using the APMonitor modeling language [35] and the IPOPT solver [36]. Structures α, β, and γ were each solved separately. Inside fold regions α and β were optimized to minimize an objective function based on width of the fold while satisfying maximum von Mises stress constraints. Outside fold region γ was optimized to minimize von Mises stress while satisfying geometric constraints which would allow the γ folds to be folded around the β folds.

The optimized dimensions for the α, β, and γ surrogate hinges are given in Table 3. The material properties remain the same as the values listed in Table 1 and the thickness of the structure was 0.079 cm.

The entire structure was fabricated from a single sheet of material using a CNC mill. Figure 11 shows the fabricated structure being folded. In its folded state, the single PCB is folded into six stacked layers and the structure occupies approximately 17% of its original footprint.

This demonstrates the utility of this regional stiffness reduction technique in designing flexible PCBs that undergo complex kinematics and can be fabricated from a single sheet. This has the potential to reduce manufacturing complexity and costs for such devices. These devices could be folded to install or undergo repeated deflection in use, as shown previously. In addition, the surrogate hinges provide structure to the mechanism that is not available using a polyimide substrate alone.

This paper presents an approach using geometric features, such as LET arrays, to create regions of flexibility on a rigid printed circuit board. This creates regions of high stiffness to avoid putting high stress on components, while also having regions that exhibit high flexibility. It enables engineers to add flexibility to parts of PCB designs while avoiding the tradeoffs that exist with global flexibility. The concept was demonstrated here using LET arrays, but other surrogate hinges could also be used.

Prototypes were designed, fabricated, and tested to verify the approach and models. LET-array surrogate hinges were the basis of the prototypes, and single hinges were constructed and tested. After 100,000 cycles of 180 deg of angular deflection, the average resistance change was less than 2%. An origami-based design demonstrated an extreme example of multiple folds, resulting in a single sheet being folded into six stacked layers with about 17% of its original footprint.

This approach could be useful in applications where PCBs are desired to conform to an arbitrary shape (see Fig. 12). For example, boards could be folded for installation. Boards could be designed with multiple panels that could fit within some space or against the walls of a container. Circuit boards based on this design could be folded to save space in stowing and deployed for increased surface area during use.

This stiffness reduction technique also provides a way to have robustness in dynamic situations where the board is deflected and relaxed repeatedly. The surrogate hinge acts as both the electrical connection and the mechanical structure. This would increase simplicity and reduce cost. In addition, its monolithic design allows it to be manufactured at small or large scales.

This work shows that flexibility can be achieved in electronic circuits using geometric design. Such an approach is readily modeled and is manufacturable using current techniques. Using surrogate hinges to create regions of flexibility and rigidity opens new possibilities for designing flexible and conformable electronics.

Thanks to Hannah Lutz for assistance developing the concept sketches and to Jason Lund for assistance with FEA modeling.

• The National Science Foundation and Air Force Office of Scientific Research (Grant No. EFRI-ODISSEI-1240417).