High-Temperature Interfacial Adhesion Strength Measurement in Electronic Packaging Using the Double Cantilever Beam Method

This paper describes the use of the double cantilever beam (DCB) method for characterizing the adhesion strength of interfaces in advanced microelectronic packages at room and high temperatures. Those interfaces include silicon–epoxy underfill, solder resist–epoxy underfill and epoxy mold compounds (EMCs), and die passivation materials–epoxy underfill materials. A unique sample preparation technique was developed for DCB testing of each interface in order to avoid the testing challenges specific to that interface—for example, silicon cracking and voiding in silicon–underfill samples and cracking of solder resist films in solder resist–underfill samples. An asymmetric DCB configuration (i.e., different cantilever beam thickness on top compared to the bottom) was found to be more effective in maintaining the crack at the interface of interest and in reducing the occurrence of cohesive cracking when compared to symmetric DCB samples. Furthermore, in order to characterize the adhesion strength of those interfaces at elevated temperatures seen during package assembly and end-user testing, an environmental chamber was designed and fabricated to rapidly and uniformly heat the DCB samples for testing at high temperatures. This chamber was used to successfully measure the adhesion strength of silicon–epoxy underfill samples at temperatures up to 260 °C, which is the typical maximum temperature experienced by electronic packages during solder reflow. For the epoxy underfills tested in this study, the DCB samples failed cohesively within the underfill at room temperature but started failing adhesively at temperatures near 150 °C. Adhesion strength measurements also showed a clear degradation with temperature. Several other case studies using DCB for material selection and assembly process optimization are also discussed. Finally, fractography results of the fractured surfaces are presented for better understanding of the failure mode.