The chiller cooled data center environment consists of many interlinked elements that are usually treated as individual components. This chain of components and their influences on each other must be considered in determining the benefits of any data center design and operational strategies seeking to improve efficiency, such as temperature controlled fan algorithms. Using the models previously developed by the authors, this paper extends the analysis to include the electronics within the rack through considering the processor heat sink temperature. This has allowed determination of the influence of various cooling strategies on the data center coefficient of performance. The strategy of increasing inlet aisle temperature is examined in some detail and found not to be a robust methodology for improving the overall energy performance of the data center, while tight temperature controls at the chip level consistently provide better performance, yielding more computing per watt of cooling power. These findings are of strong practical relevance for the design of fan control algorithms at the rack level and general operational strategies in data centers. Finally, the impact of heat sink thermal resistance is considered, and the potential data center efficiency gains from improved heat sink designs are discussed.
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September 2011
Research Papers
From Chip to Cooling Tower Data Center Modeling: Influence of Chip Temperature Control Philosophy
Thomas J. Breen,
Thomas J. Breen
Stokes Institute, University of Limerick
, Limerick, Ireland
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Jeff Punch,
Jeff Punch
CTVR, Stokes Institute, University of Limerick
, Limerick, Ireland
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Amip J. Shah,
Amip J. Shah
Hewlett-Packard Laboratories
, Palo Alto, CA 94304
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Cullen E. Bash
Cullen E. Bash
Hewlett-Packard Laboratories
, Palo Alto, CA 94304
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Ed J. Walsh
Thomas J. Breen
Stokes Institute, University of Limerick
, Limerick, Ireland
Jeff Punch
CTVR, Stokes Institute, University of Limerick
, Limerick, Ireland
Amip J. Shah
Hewlett-Packard Laboratories
, Palo Alto, CA 94304
Cullen E. Bash
Hewlett-Packard Laboratories
, Palo Alto, CA 94304J. Electron. Packag. Sep 2011, 133(3): 031008 (6 pages)
Published Online: September 21, 2011
Article history
Received:
April 7, 2011
Revised:
May 9, 2011
Online:
September 21, 2011
Published:
September 21, 2011
Citation
Walsh, E. J., Breen, T. J., Punch, J., Shah, A. J., and Bash, C. E. (September 21, 2011). "From Chip to Cooling Tower Data Center Modeling: Influence of Chip Temperature Control Philosophy." ASME. J. Electron. Packag. September 2011; 133(3): 031008. https://doi.org/10.1115/1.4004657
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