Over upcoming electronics technology nodes, shrinking feature sizes of on-chip interconnects and correspondingly higher current densities are expected to result in higher temperatures due to self-heating. This study describes a finite element based compact thermal modeling approach to investigate the effects of Joule heating on complex interconnect structures. In this method, interconnect cross section is assumed to be isothermal and conduction along the interconnect is retained. A composite finite element containing both metal and dielectric regions is used to discretize the interconnect stack. The compact approach predicts the maximum temperature rise in the metal to within 5–10% of the detailed numerical computations, while requiring only a fraction of elements. Computational time for the compact model solution is several seconds, versus many hours for the detailed solutions obtained through successive mesh refinement until grid independence is achieved. For a comparable number of elements, the compact model is in general much more accurate than the traditional finite element approach. To validate the simulations, temperature rise in a 500-link two-layer interconnect with a via layer was measured at several current densities. The compact method predicts the temperature rise of the 500-link chain to within 5% of the measurements thereby validating the method. The approach described here could be an efficient technique for full chip Joule heating simulations and for clock signal propagation simulations, which are performed as part of designing next generation chip architectures.
Skip Nav Destination
Article navigation
September 2008
Research Papers
A Compact Approach to On-Chip Interconnect Heat Conduction Modeling Using the Finite Element Method
Siva P. Gurrum,
Siva P. Gurrum
Semiconductor Packaging Technology Research,
Texas Instruments Incorporated
, Dallas, TX 75243
Search for other works by this author on:
Yogendra K. Joshi,
Yogendra K. Joshi
G. W. Woodruff School of Mechanical Engineering,
Georgia Institute of Technology
, Atlanta, GA 30332
Search for other works by this author on:
William P. King,
William P. King
Deparment of Mechanical Science and Engineering,
University of Illinois at Urbana-Champaign
, Urbana, IL 61801
Search for other works by this author on:
Koneru Ramakrishna,
Koneru Ramakrishna
Package Material Technology Development, Analog & Mixed Signal Technologies,
Technology Solutions Organization
, Freescale Semiconductor, Inc., Austin, TX 78735
Search for other works by this author on:
Martin Gall
Martin Gall
Package Material Technology Development, Analog & Mixed Signal Technologies,
Technology Solutions Organization
, Freescale Semiconductor, Inc., Austin, TX 78735
Search for other works by this author on:
Siva P. Gurrum
Semiconductor Packaging Technology Research,
Texas Instruments Incorporated
, Dallas, TX 75243
Yogendra K. Joshi
G. W. Woodruff School of Mechanical Engineering,
Georgia Institute of Technology
, Atlanta, GA 30332
William P. King
Deparment of Mechanical Science and Engineering,
University of Illinois at Urbana-Champaign
, Urbana, IL 61801
Koneru Ramakrishna
Package Material Technology Development, Analog & Mixed Signal Technologies,
Technology Solutions Organization
, Freescale Semiconductor, Inc., Austin, TX 78735
Martin Gall
Package Material Technology Development, Analog & Mixed Signal Technologies,
Technology Solutions Organization
, Freescale Semiconductor, Inc., Austin, TX 78735J. Electron. Packag. Sep 2008, 130(3): 031001 (8 pages)
Published Online: July 29, 2008
Article history
Received:
March 13, 2006
Revised:
October 23, 2007
Published:
July 29, 2008
Citation
Gurrum, S. P., Joshi, Y. K., King, W. P., Ramakrishna, K., and Gall, M. (July 29, 2008). "A Compact Approach to On-Chip Interconnect Heat Conduction Modeling Using the Finite Element Method." ASME. J. Electron. Packag. September 2008; 130(3): 031001. https://doi.org/10.1115/1.2957318
Download citation file:
Get Email Alerts
Enhancing Mechanical Reliability of Silver-Sintered Joints With Copper Nanowires in High-Power Electronic Devices
J. Electron. Packag (December 2024)
Special Issue on InterPACK2023
J. Electron. Packag (December 2024)
Impact of Encapsulated Phase Change Material Additives for Improved Thermal Performance of Silicone Gel Insulation
J. Electron. Packag (December 2024)
Related Articles
On the Thermal Performance Characteristics of Three-Dimensional Multichip Modules
J. Electron. Packag (September,2004)
Ground-Coupled Heat and Moisture Transfer from Buildings Part 1–Analysis and Modeling
J. Sol. Energy Eng (February,2002)
An Algorithm Study on Inverse Identification of Interfacial Configuration in a Multiple Region Domain
J. Heat Transfer (February,2009)
A Phase-Sensitive Technique for Measurements of Liquid Thermal Conductivity
J. Heat Transfer (May,2010)
Related Proceedings Papers
Related Chapters
Conclusion
Introduction to Finite Element, Boundary Element, and Meshless Methods: With Applications to Heat Transfer and Fluid Flow
Introduction
Introduction to Finite Element, Boundary Element, and Meshless Methods: With Applications to Heat Transfer and Fluid Flow
Orthotropic Media
Thermal Spreading and Contact Resistance: Fundamentals and Applications