A methodology was developed and implemented to optimize the design layout for i_ntegrated p_ower e_lectronics m_odules (IPEMs) by considering both the electrical and thermal performances. This paper is primarily focused on the thermal aspects, which were analyzed using three-dimensional (3D) computational software tools. Implementation of the design methodology resulted in a 70 percent reduction in the common mode current, a 4 percent reduction in the size of the geometric footprint, and a 7°C reduction in the maximum temperature rise for the case studied, thus, providing an increase in the IPEM’s overall performance.

Keywords:
modules, thermal management (packaging), power integrated circuits, integrated circuit packaging, integrated circuit design, thermal analysis, circuit optimisation, electronic engineering computing, Integrated Design Optimization, Integrated Power Electronic Module, Thermal Analysis
Topics:
Design, Thermal analysis, Temperature, Optimization
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 by ASME
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