During the underfill process, polymers driven by either capillary force or external pressure are filled at a low speed between the chip and substrate. Current methods treated the flow in the chip cavity as a laminar flow between parallel plates, which ignored the resistance induced by the solder bumps or other obstructions. In this study, the filling flow between solder bumps was simulated by a flow through a porous media. By using the superposition of flows through parallel plates and series of rectangular ducts, permeability of the underfill flow was fully characterized by the geometric arrangement of solder bumps and flat chips. The flow resistances caused by adjacent bumps were represented in its permeability. The model proposed in this study could provide a numerical approach to approximate and simulate the undefill process for flip-chip technology. Although the proposed model is applicable for any geometric arrangement of solder bumps, rectangular-array of solder bumps layout was used first for comparison with experimental results of other article. Comparisons of the flow-front shapes and filling time with the experimental data indicated that the flow simulation obtained from the proposed model gave a good prediction for the underfill flow.
A Model for Underfill Viscous Flow Considering the Resistance Induced by Solder Bumps
Contributed by the Electronic and Photonic Packaging Division for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received April 2003; final revision, November 2003. Associate Editor: B. Courtois.
- Views Icon Views
- Share Icon Share
- Cite Icon Cite
- Search Site
Lai , C., and Young, W. (July 8, 2004). "A Model for Underfill Viscous Flow Considering the Resistance Induced by Solder Bumps ." ASME. J. Electron. Packag. June 2004; 126(2): 186–194. https://doi.org/10.1115/1.1649244
Download citation file:
- Ris (Zotero)
- Reference Manager