We study stresses and fracture due to temperature change in a flip-chip assembly at the chip/underfill interface for various thermo-mechanical properties of underfill and the device’s geometry. We conduct our calculations numerically using a finite element method, and employ the J-integral approach and calculate the stress intensity factors for fracture analysis. We assume that all materials are linear elastic and isotropic, and properties are temperature independent. We use several simplified models of flip-chip devices, while neglecting C4 solder interconnects. We represent the devices as either bi-material strips or as three different types of a three-layer model.
Stresses and Fracture at the Chip/Underfill Interface in Flip-Chip Assemblies
Contributed by the Electronic and Photonic Packaging Division for publication in the Journal of Electronic Packaging. Manuscript received by the EPPD Division, December 20, 2001. Associate Editor: K. Kishimoto.
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Park, J. E., Jasiuk, I., and Zubelewicz, A. (March 14, 2003). "Stresses and Fracture at the Chip/Underfill Interface in Flip-Chip Assemblies ." ASME. J. Electron. Packag. March 2003; 125(1): 44–52. https://doi.org/10.1115/1.1527656
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