An elasto-plastic-creep analysis of a low-cost micro via-in-pad (VIP) substrate for supporting a solder bumped flip chip in a chip scale package (CSP) format which is soldered onto a printed circuit board (PCB) is presented in this study. Emphasis is placed on the design, materials, and reliability of the micro VIP substrate and of the micro VIP CSP solder joints on PCB. The solder is assumed to obey Norton’s creep law. Cross-sections of samples are examined for a better understanding of the solder bump, CSP substrate redistribution, micro VIP, and solder joint. Also, the thermal cycling test results of the micro VIP CSP PCB assembly is presented.
Nonlinear-Time-Dependent Analysis of Micro Via-In-Pad Substrates for Solder Bumped Flip Chip Applications
Contributed by the Electronic and Photonic Packaging Division for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received by the EPPD August 9, 2000. Associate Editor: Yi-Hsin Pao.
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Lau, J. H., Lee, S. W. R., Pan , S. H., and Chang, C. (July 26, 2002). "Nonlinear-Time-Dependent Analysis of Micro Via-In-Pad Substrates for Solder Bumped Flip Chip Applications ." ASME. J. Electron. Packag. September 2002; 124(3): 205–211. https://doi.org/10.1115/1.1462626
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