In our previous works, the piezoresistive sensors have been demonstrated to be accurate and efficient tools for stress measurements in microelectronic packaging. In this study, we first designed test chips with piezoresistive stress sensors, temperature sensors as well as heats, and the test wafers were next manufactured through commercialized IC processes. Piezoresistive sensors on silicon strips, which were cut directly from silicon wafers at a specific angle, were then calibrated, and highly consistent piezoresistive coefficients were extracted at various wafer sites so that both normal and shear stress on the test chips can be measured. Finally, we packaged the test chips into 100-pin PQFP structures with different batches and measured internal stresses on the test chips inside the packaging. After measuring packaging induced stresses as well as thermal stresses on several batches of PQFPs, it was found that the normal stress diversities were obvious from different batches of the packaging structure, and the shearing stresses were approximately zero in all of the PQFPs at different chip site.
In-Plane Packaging Stress Measurements Through Piezoresistive Sensors
Contributed by the Electronic and Photonic Packaging Division for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received by the EPPD February 27, 2001; Associate Editor: B. Michel.
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Lwo, B., Chen, T., Kao, C., and Lin, Y. (May 2, 2002). "In-Plane Packaging Stress Measurements Through Piezoresistive Sensors ." ASME. J. Electron. Packag. June 2002; 124(2): 115–121. https://doi.org/10.1115/1.1452244
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