Nowadays, thermal characterization of IC packages and packaging technologies is becoming a key task in thermal engineering. To support this by measurements, we developed a family of thermal test chips that allow a wide range of possible applications. Our chips are based on the same basic cell that is mainly covered by dissipating resistors and also contains a temperature sensor. These basic cells are organized into arrays of different size. The arrays are designed such that further “super arrays” can also be built for tiling up larger package cavities. The first members of the family, TMC9 and TMC81, have been manufactured. Our measurements show that the goals aimed at the design have been achieved.
A Scalable Multi-Functional Thermal Test Chip Family: Design and Evaluation
Contributed by the Electronic and Photonic Packaging Division for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received by the EPPD June 2, 2001, Associate Editor: B. Courtois.
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Benedek, Z., Courtois, B., Farkas, G., Kolla´r, E., Mir, S., Poppe, A., Rencz, M., Sze´kely, V., and Torki, K. (June 2, 2001). "A Scalable Multi-Functional Thermal Test Chip Family: Design and Evaluation ." ASME. J. Electron. Packag. December 2001; 123(4): 323–330. https://doi.org/10.1115/1.1389846
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