The nested finite element methodology (NFEM) presented in Part I of this series, is used in this paper to analyze the viscoplastic stress-state in a flip-chip-on-board (FCOB) and a chip scale package subjected to temperature cycling loads. The results are validated with conventional finite element method (CFEM). An energy-partitioning (EP) damage model is used to predict cycles to failure, based on the energy densities obtained from NFEM and CFEM, and results are compared with experiments.
A Nested Finite Element Methodology (NFEM) for Stress Analysis of Electronic Products—Part II: Durability Analysis of Flip Chip and Chip Scale Interconnects
Contributed by the Electrical and Electronic Packaging Division for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received at ASME Headquarters October 10, 2000. Associate Editor: J. Lau
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Darbha, K., and Dasgupta, A. (October 10, 2000). "A Nested Finite Element Methodology (NFEM) for Stress Analysis of Electronic Products—Part II: Durability Analysis of Flip Chip and Chip Scale Interconnects ." ASME. J. Electron. Packag. June 2001; 123(2): 147–155. https://doi.org/10.1115/1.1328745
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