The case is made for the continued use of single valued thermal resistances for the prediction of component junction temperature, and, hence, reliability. These values are adjusted using empirically determined influence factors to account for thermal and aerodynamic interactions at board level. The paper presents measured values of influence factors for arrays of Plastic Quad Flat Packs (PQFPs) over a range of Reynolds numbers and with a series of board level obstacles modeling upstream passive components. The results are formulated into a novel set of design rules.
Forced Convection Board Level Thermal Design Methodology for Electronic Systems
Contributed by the Electrical and Electronic Packaging Division for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received by the EEPD September 11, 1999; revised manuscript received July 21, 2000. Associate Editor: R. Wirtz.
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Cole, R., Dalton , T., Punch , J., Davies , M. R., and Grimes, R. (July 21, 2000). "Forced Convection Board Level Thermal Design Methodology for Electronic Systems ." ASME. J. Electron. Packag. June 2001; 123(2): 120–126. https://doi.org/10.1115/1.1339822
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