A generalized multi-domain Rayleigh-Ritz (MDRR) approach developed by Ling and Dasgupta (1995), is extended in this paper, to obtain the stress field in flip chip solder interconnects, under cyclic thermal loading. Elastic, Plastic and time-dependent visco-plastic analysis is demonstrated on flip chip solder interconnects. The method has been applied to other surface-mount interconnects in the past such as J-lead (Ling and Dasgupta, 1996a) and ball-grid joints (Ling and Dasgupta, 1997). The analysis results for the J-lead and ball grid joints have confirmed that the MDRR technique is capable of providing stress-strain hysteresis with adequate accuracy, at a fraction of the modeling effort required for finite element model generation and analyses. Nonlinear viscoplastic stress analysis results for flip chip interconnects without underfill are presented in this paper. The fatigue endurance of the solder joints is assessed by combining results from this stress analysis model with an energy-partitioning damage model (Dasgupta et al., 1992). The life predicted by the analytical damage model is compared with experimental results.

1.
ABAQUS, 1995, Version 5.5, Theory Manual, Hibbitt, Karlsson & Sorensen, RI.
2.
Bhandarkar, S. M., 1992, “Thermomechanical Analysis and Fatigue Life Prediction of Plated-Through-Hole and Multilayer Printed Wiring Board,” Ph.D. dissertation, University of Maryland, College Park, MD.
3.
Darbha, K., Ling, S., and Dasgupta, A., 1997, “Stress Analysis of Surface Mount Interconnects Due to Vibrational Loading,” to be published in the ASME JOURNAL OF ELECTRONIC PACKAGING.
4.
Dasgupta
A.
,
Oyan
C.
,
Barker
D.
, and
Pecht
M.
,
1992
, “
Solder Creep-Fatigue Analysis by an Energy-Partitioning Approach
,”
ASME JOURNAL OF ELECTRONIC PACKGING
, Vol.
114
, pp.
152
160
.
5.
Doi
K.
,
Hirano
N.
,
Okada
T.
,
Hiruta
Y.
,
Sudo
T.
, and
Mukai
M.
,
1996
, “
Prediction of Thermal Fatigue for Encapsulated Flip Chip Interconnection
,”
Microcircuits and Electronic Packaging
, Vol.
19
, No.
3
, pp.
231
237
.
6.
Hertzberg, R. W., 1989, Deformation and Fracture Mechanics of Engineering Materials, John Wiley & Sons, New York.
7.
Kraus, H., 1980, Creep Analysis, Wiley-Interscience, John Wiley & Sons, New York.
8.
Lau
J.
,
1996
, “
Solder Joint Reliability of Flip Chip and Plastic Ball Grid Array Assemblies Under Thermal, Mechanical and Vibrational Conditions
,”
IEEE Transactions on Components, Packaging and Manufacturing Technology-Part B
, Vol.
19
, No.
4
, pp.
728
735
.
9.
Le Gall, C. A., Qu, J., and McDowell, D. L., 1997, “Influence of Die Size on the Magnitude of Thermomechanical Stresses in Flip Chips Directly Attached to Printed Wiring Board,” Proceedings; InterPACK’97, EEP-Vol. 19-2, ASME, New York, pp. 1663–1670.
10.
Ling, S., and Dasgupta, A., 1995, “A Multi-Domain Stress Analysis Method for Surface Mount Solder Joints,” Proceedings, ASME International, Intersociety Electronic Packaging Conference & Exhibition, March 26–30, 1995, Hawaii.
11.
Ling, S., and Dasgupta, A., 1996a, “A Nonlinear Multidomain Stress Analysis Method for Surface-Mount Solder Joints,” ASME Journal of Electronic Packaging, June.
12.
Ling, S., and Dasgupta, A., 1996b, “A Nonlinear Multidomain Thermomechanical Stress Analysis Method for Surface-Mount Solder Joints: Part II: Viscoplastic Analysis,” Proceedings, 8th Annual Mechanics of Surface Mount Assemblies Symposium at the ASME International Mechanical Engineering Congress and Exposition, Atlanta, GA, ASME, New York, pp. 1109–1114.
13.
Ling, S., and Dasgupta, A., 1997, “A Thermomechanical Stress Analysis of BGA Interconnects Using the MDRR Technique,” InterPACK’97, ASME International Intersociety Electronic Conference.
14.
Nhan, E., Birth, Q. L., Maurer, H. R., Lew, A. L., Lander, J. R., Schwartz, P. D., and Darrin, A. G., 1997, “Reliability Study of Chip-On-Board Technology for Space Applications With a 3-D Stacked DRAM as Test Vehicle,” InterPACK’97, EEP-Vol. 19-2, ASME, New York, pp. 1679–1684.
15.
Pecht, M., 1991, Handbook of Electronic Packaging and Design, Marcel Dekker Inc., New York, pp. 732–734.
16.
Rothman, T., 1995, “Physics-of-Failure Space Applications With a 3-D Stacked DRAM as Test Vehicle,” InterPACK’97, EEP-Vol. 19-2, ASME, New York, pp. 1679–1684.
17.
Pecht, M., 1991, Handbook of Electronic Packaging and Design, Marcel Dekker, Inc., New York, pp. 732–734.
18.
Rothman, T., 1995, “Physics-of-Failure Methodology for Accelerated Thermal Cycling of LCC Solder Joints,” M.S. thesis, University of Maryland, College Park, MD.
19.
Schubert, A., Dudek, R., Auersperg, J., Vogel, A., Michel, B., and Reichl, H., 1997, “Thermomechanical Reliability Analysis of Flip Chip Assemblies by Combined Microdac and the Finite Element Method,” InterPACK’97, EEP-Vol. 19-2, ASME, New York, pp. 1647–1654.
20.
Yeh
C.
,
Zhou
W.
, and
Wyatt
K.
,
1996
, “
Parametric Finite Element Analysis of Flip Chip Reliability
,”
Microcircuits and Electronic Packaging
, Vol.
19
, No.
2
, pp.
120
127
.
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