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International Conference on Advanced Computer Theory and Engineering (ICACTE 2009)
Xie Yi
Xie Yi
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In cryptography, the advanced encryption standard (AES) is an encryption standard issued as FIPS by NIST as a successor to data encryption standard (DES) algorithm. The applications of the AES are wide including any sensitive data that requires cryptographic protection before communication or storage. This paper proposes extending general-purpose processors with crypto coprocessor based on decoupled architectures. The extended coprocessor splits an encryption/decryption instruction into memory (load/store) and computation (encryption/decryption) portions (pseudo instructions). Loading/storing and encrypting/decrypting data are performed in parallel and communicated through architectural queues. The computational unit includes parallel AES pipelines for fast encrypting/decrypting data. On four parallel AES pipelines, our results show a performance of 222 Gigabits per second.

Key Words
1. Introduction
2. The Microarchitecture of Fastcrypto
3. Parallel Implementation of AES Pipeline
4. Conclusions
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