35 Parallel Random Access Memory Implementation on an FPGA

Sequential processing has dominated the computer world. Substantial speedups can be made using parallel architecture. However, parallel algorithms often require shared memory. This paper introduces a four-port Parallel Random Access Memory (P-RAM) integrated circuit emulated on a Cyclone II FPGA. The P-RAM was simulated and connected to the STORM System-on-Chip. This implementation is limited to 4kb of memory as it is optimized for speed and sacrifice flip-flops and multiplexers. Contributions are made in the design of a P-RAM and FPGA implementation and operations. These findings suggest that parallel RAM integrated circuit is viable and can be integrated into modern computer architecture.