104 The Implementation of Channelized Receiver Through FPGA
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The channelized receiver is obtained by polyphase filter banks, which makes Multi-channel signals received parallel. The channelizing is realized in the FPGA device of xc4vsx55 which belongs to Virtex4 group in Xilinx family. During the process of design, highly effective of polyphase and the parallel assembly line structure’s FFT flexibility are fully considered, which reduce the operand enormously and raise the operating speed. Simulation is gotten by using combined simulation of ISE, Modelsim and Matlab, the result is confirmed effective.