International Conference on Instrumentation, Measurement, Circuits and Systems (ICIMCS 2011)
170 A Reconfigurable Architecture for Implementation of Network Traffic Control Function
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Traffic control computation in high speed routers and switches is usually implemented with ad hoc hardware which is not reusable. This paper presents a reconfigurable architecture for network traffic control computations, based on an Augmented Finite State Machine (AFSM) controller, and the architecture is reconfigurable. The implementation of new traffic control features is realized in software, thus relieves the burden on hardware designers. Additionally, several traffic control algorithms in this paper are realized with the architecture to prove its hardware circuit high-speeded, reliable and stable. At last, with the electronic design automation tools (EDA), the frequency of the hardware circuit is up to 260MHz.