Skip to Main Content
Skip Nav Destination
ASME Press Select Proceedings

International Conference on Computer and Automation Engineering, 4th (ICCAE 2012)

Jianhong Zhou
Jianhong Zhou
Search for other works by this author on:
No. of Pages:
ASME Press
Publication date:

This article is on the CNTFET structure and to optimize power consumption and miniaturization of CNT based transistors as possible. The parameters of such structure and their impact on the on and off-current mode has been study to use in future construction of Low Operating Power circuits (LOP) , especially excitatory neurons in the brain cortex nerve (synthetic cortex). Our simulations implement in HSPICE environment and on the n - i - n CNTEFT. We have spice models to use CNTFET simulation [6].

This content is only available via PDF.
You do not currently have access to this chapter.
Close Modal

or Create an Account

Close Modal
Close Modal