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ASME Press Select Proceedings
International Conference on Computer and Automation Engineering, 4th (ICCAE 2012)
ISBN:
9780791859940
No. of Pages:
460
Publisher:
ASME Press
Publication date:
2012
eBook Chapter
4 Low Power and Low Area Analog Multiplier Using MiFGMOS
By
K. Duraisamy
,
K. Duraisamy
Dean/Academic,
K.S.Rangasamy College of Technology
, Tiruchengode,
; deanac@ksrct.ac.inIndia
— 630 215
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U. Ragavendran
U. Ragavendran
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Page Count:
8
-
Published:2012
Citation
Duraisamy, K, & Ragavendran, U. "Low Power and Low Area Analog Multiplier Using MiFGMOS." International Conference on Computer and Automation Engineering, 4th (ICCAE 2012). Ed. Zhou, J. ASME Press, 2012.
Download citation file:
A novel 4- quadrant analog multiplier using floating gate MOS (FGMOS) transistors operating in saturation region are implemented. Floating gate MOSFETs are being utilized in a number of new and existing analog applications. These devices are not only useful for designing memory elements but also we can implement circuit elements. The main advantage in FGMOS is that the drain current is proportional to square of the weighted sum of input signals. By using conventional transistors we obtain only few hundred mill volts range of the supply voltage and when we go for square law devices we obtain up to 50%....
Topics:
Circuits,
Design,
Electrical measurement,
Gates (Closures),
Signals,
Simulation,
Transistors
Abstract
Key Words
I. Introduction
II. The FGMOS Transistor
III. Existing Folded COMS — Multiplier
IV. Proposed FGMOS Transistor — Multiplier
V. Power Analysis
VI. Conclusion
Reference
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