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International Conference on Computer and Automation Engineering, 4th (ICCAE 2012)

Jianhong Zhou
Jianhong Zhou
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A novel 4- quadrant analog multiplier using floating gate MOS (FGMOS) transistors operating in saturation region are implemented. Floating gate MOSFETs are being utilized in a number of new and existing analog applications. These devices are not only useful for designing memory elements but also we can implement circuit elements. The main advantage in FGMOS is that the drain current is proportional to square of the weighted sum of input signals. By using conventional transistors we obtain only few hundred mill volts range of the supply voltage and when we go for square law devices we obtain up to 50%....

Key Words
I. Introduction
II. The FGMOS Transistor
III. Existing Folded COMS — Multiplier
IV. Proposed FGMOS Transistor — Multiplier
V. Power Analysis
VI. Conclusion
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