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ASME Press Select Proceedings
International Conference on Computer and Electrical Engineering 4th (ICCEE 2011)
By
Jianhong Zhou
Jianhong Zhou
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ISBN:
9780791859841
No. of Pages:
698
Publisher:
ASME Press
Publication date:
2011

An integrated download and test tool based on IEEE 1149.1 JTAG methodology is designed for use in downloading and testing an SRAM-based FPGA chip. The chip is fabricated with a 0.5um SOI-CMOS process technology. Comparing with Xilinx FPGA configuration tool iMPACT, our integrated tool adds a full range of test capabilities to the basic download functionality. This tool has been used in normal and radiation hardening tests of the fabricated chips and accomplishes a complete test set of high test coverage through both GUI and batch command modes.

Abstract
Keywords
1.Introduction
2. FPGA Architecture
3. Integrated Download and Test Tool
4.Summary
References
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