Electric Circuit Analogs of First-Order Dual-Phase-Lag Diffusion

Tzou [1] proposed the dual-phase-lag (DPL) approach to describe transient heat diffusion (conduction) in continuum applications that are beyond the scope of the classical model of Fourier's law for heat conduction. The approach involves two phase lags that signify departures from Fourier's law, as described in more detail later. Also, Tzou [2] discussed the expanding range of applications for DPL heat conduction, including ultrafast-pulse laser heating of metals, thermomechanics, and conduction in amorphous materials. This discussion also extended to other processes involving diffusion, such as mass transfer in solids and momentum transport in viscoelastic liquids.

More recently, studies adopting the DPL approach involved, for example, thermoelastic materials [3] and fractional derivatives [4]. Plus, Kovács [5] compared the DPL approach and its thermodynamic validity to other non-Fourier models of heat conduction. Additionally, Zubert et al. [6] described software to convert the mathematical statement of a DPL heat conduction problem into a spice format (simulationprogramwithintegratedcircuitemphasis [7]). The converted problem could then be solved using other software packages supporting the format.

In contrast to previous studies, the innovative contribution of the work reported here is the design of RLC-type (resistor–inductor–capacitor) and RCC-type (resistor–capacitor–capacitor) circuits that behave as discrete analogs of first-order, continuum DPL diffusion. As shown shortly, first-order denotes a particular mathematical form of the DPL model. The motivation for these circuits is to propose a new direction for the DPL approach and open the door to novel applications involving electronics that incorporate DPL circuits. Also, these circuits offer the potential advantage of conveniently inferring phase lags for cases of heat, mass, and momentum transfer that are difficult to access experimentally.

The objective here is to identify the mechanisms of DPL behavior in elementary circuits to help guide the future study of more complicated circuits and their potential applications. Accordingly, this work derives the equations governing one-dimensional circuits comprised of ideal components with constant values. Expressions for the phase lags that characterize DPL behavior arise during the derivation. Then, simulations show DPL behavior in simple ladder circuits to identify the mechanisms underlying the behavior.

Section 1.3 cites those elements of the DPL approach that are essential to conveniently drawing the analogies between DPL continuum equations and those of the discrete circuits.

For brevity, these elements refer to only temperature in the context of heat conduction even though there are other processes involving DPL diffusion, as noted earlier. In the work here, consequently, voltage is the analog to temperature.

In the DPL approach to transient heat conduction in the continuum along the Cartesian $x$-coordinate, a heat flux q occurring in a medium at time $t+τq$ causes a temperature gradient $∂T/∂x$ in the medium at a different time $t+τT$ [1,2], and vice versa. Importantly, $τq$ and $τT$ are phase lags that represent the times needed for heat flux and temperature gradient, respectively, to achieve values corresponding to Fourier's law in the medium. With Fourier's law, $τq=0$ and $τT=0$⁠, implying an immediate response between heat flux and temperature gradient. Values reported for the DPL phase lags range, for example, from picoseconds in metals to seconds for biological tissue [2]. In the work here, phase lags for the circuits will range from 0.1 ms to 1 ms.

after neglecting terms of higher order for sufficiently small phase lags. Setting the phase lags to zero in Eq. (1) reduces it to Fourier's law.

In Eq. (2), $C$ is the volumetric heat capacity of the medium, $S$ is its volumetric rate of energy generation or absorption, and$α$ is its thermal diffusivity, where $α=k/C$⁠. Equation (2) reduces to the Fourier heat conduction equation for $τq=0$ and $τT=0$⁠. For $τq≠0$ and $τT=0$⁠, it reduces to the hyperbolic heat conduction equation.

The ratio of phase lags, $P=τT/τq$⁠, defines the regimes of DPL behavior in the medium [1,2]. In general terms, increasing the value of $P$ corresponds to faster propagation speeds of thermal disturbances in the medium.

More specifically, for hyperbolic conduction $(P=0)$⁠, the medium is heated by damped thermal waves with relatively slow propagation speeds. The value $P=1$⁠, however, denotes Fourier conduction where heating occurs by only diffusion with faster propagation speeds. Notably, the regime defined by $0<P<1$ corresponds to wave-like DPL heating [8] because of its combined features of waves and diffusion. The propagation speeds of wave-like heating lie between those of the hyperbolic and Fourier cases. For $P>1$⁠, the DPL behavior is termed over-diffusive [8] because the propagation speeds increase in concert with increasing values of $P$⁠. Interestingly, $P=1$ implies that Fourier conduction can correspond to phase lags that are nonzero but equal (Tzou 2015, 73).

Figure 1 shows the schematic for a segment of the one-dimensional circuit with discrete components that produces behavior analogous to wave-like, continuum DPL heating. This segment starts at node n − 1, continues through node n, and ends at node n + 1, with corresponding voltages $Vn−1$⁠, $Vn$⁠, and $Vn+1$ relative to ground. Node z plays a role in the derivation of equations described shortly. The RLC components have constant values and ideal current–voltage relationships [9]. Also, the connecting wires throughout the circuit have zero resistance, and the initial state of the circuit corresponds to zero current and zero voltage.

The key features of the circuit are cell 1 and cell 2, connected at n, because the DPL behavior occurs in these cells as shown later. Each cell contains resistors $R1$ and $R2$⁠, and inductor L, and each cell connects to a capacitor $C1$⁠. The cells connect also to unspecified devices $Dn−1$⁠, $Dn$⁠, and $Dn+1$⁠. These devices can be different for each cell and could be, for example, resistors or current sources. The topology of the circuit repeats so it can consist of one cell or as many as needed.

Currents $I1$ and $I2$ flow through the branches with $R1$ in cell 1 and cell 2 as noted. In cell 1, $Ia$ and $Ib$ are the branch currents in L and $R2$⁠, respectively. Other currents that are not shown in the cells are assumed to flow from left to right. Furthermore, the currents $IC1$ and $IDn$with their assumed directions correspond to their respective capacitor and device, and $I3$ flows from n as shown. The directions for the currents in Fig. 1 can change depending on the operating conditions of the circuit.

with subscript $WL$ denoting wave-like.

Equation (3) is a discrete analog of Eq. (1) with $I1$ and $1/R1$ taking on the roles of, in turn, heat flux and thermal conductivity. The voltage difference $(Vn−Vn−1)$ in Eq. (3) is the analog to temperature gradient in Eq. (1). In addition, this work defines $τI,WL$ and $τV,WL$ in Eq. (3) as the phase lags of current and voltage difference, respectively, by analogy to $τq$ and $τT$ in Eq. (1).

Equation (4c) shows that $PWL<1$ for this wave-like circuit analogous to wave-like heating. Later, reducing the wave-like circuit to limiting cases provides complete bounds on $PWL$⁠. A practical note is that the derivation of Eq. (3) and the circuit equations that follow in this work do not require the condition of small phase lags, in contrast to Eqs. (1) and (2) that pertain to DPL heat conduction.

The second step in the derivation for the wave-like circuit is to obtain the relation between current and voltage difference for cell 2 by following the same type of approach just described for cell 1. This relation for cell 2 is not shown here because it has the same form as Eq. (3), after replacing the current and voltage difference in that equation with $I2$ and $(Vn+1−Vn)$⁠.

where $ΔVn=Vn+1−2Vn+Vn−1$ is the discrete Laplacian of voltage $Vn$⁠.

Equation (6) is a discrete analog of Eq. (2), with $1/(R1C1)$⁠, $C1$⁠, and $IDn$ assuming the roles of thermal diffusivity, volumetric heat capacity, and volumetric rate of energy generation or absorption, respectively, and $ΔVn$ appearing in place of $∂2T/∂x2$⁠.

Taking the limit $R2→∞$ for each cell in Fig. 1 reduces the wave-like circuit to the circuit analog for hyperbolic conduction given in Ref. [10]. The reduction occurs because the branches with $R2$ behave as open circuits in this limit, so current in each cell flows through only $L$ and $R1$⁠. Also in this limit, Eqs. (4a) and (4b) show that $τI, H=(L/R1)$ and $τV,H=0$⁠, respectively, where subscript $H$ denotes hyperbolic, and Eq. (6) reduces to the governing equation for the hyperbolic circuit. In addition, Eq. (4c) shows that $PH=0$ to set the lower bound on the phase lag ratio.

On the other hand, setting $R2=0$ in each cell causes currents to bypass the inductors because the branches with $R2$ behave as short circuits. Then, the wave-like circuit reduces to the circuit analog for Fourier conduction shown in Ref. [11]. This Fourier circuit corresponds to $τI, F=0$ and $τV,F=0$⁠, where subscript $F$ refers to Fourier, and Eq. (6) reduces to the Fourier circuit equation. Also, for $R2→0$⁠, Eq. (4c) shows that $PF=1$ to define the upper bound on the phase lag ratio from the perspective of wave-like diffusion. Therefore, $0<PWL<1$ for the wave-like circuit. Appendix  A.1 discusses the analysis of Ref. [12] that involves another reduction from the DPL model.

The circuit that behaves as a discrete analog of over-diffusive, continuum DPL heating results from replacing every inductor L in the schematic of Fig. 1 with an ideal capacitor $C2$⁠. This capacitor has the same constant value throughout the circuit. For this over-diffusive circuit, all other details associated with Fig. 1 are the same as stated previously for the wave-like circuit.

where subscript $OD$ refers to over-diffusive. Also, $τI, OD$ and $τV,OD$ are defined here as the phase lags of current and voltage difference, respectively, for this over-diffusive case. Equation (7) is a discrete analog of Eq. (1) with $1/(R1+R2)$ replacing thermal conductivity and $(Vn−Vn−1)$ standing in for temperature gradient.

Analogous to over-diffusive heating, Eq. (8c) shows that $POD>1$ for the over-diffusive circuit. The full set of bounds on $POD$ will be defined shortly by reducing the over-diffusive circuit to limiting cases.

The next step in the derivation for the over-diffusive circuit is to note that the current–voltage relation for cell 2 stems from Eq. (7) by substituting $I2$ and $(Vn+1−Vn)$ for the corresponding terms there. For brevity, this relation for cell 2 is not shown.

Then, subtracting the relation just described for cell 2 from Eq. (7) for cell 1 gives the equation for $(I1−I2$⁠) in the over-diffusive case. This equation for $(I1−I2$⁠) is not shown here because it has the same form as Eq. (5), after replacing $R1$ in Eq. (5) with $(R1+R2)$ and updating the phase lags to their over-diffusive notations.

Equation (9) is a discrete analog of Eq. (2) with $1/[(R1+R2)C1]$ replacing thermal diffusivity, etc.

For the over-diffusive circuit in Fig. 1, setting $R1=0$ in each cell causes the branches with $R1$ to behave as short circuits. The over-diffusive circuit, then, reduces to a limiting case defined in this work as the over-diffusive limit. Also, for $R1→0$⁠, Eqs. (8a) and (8b) show that $τI, ODL=0$⁠, $τV,ODL=R2C2$⁠, and Eq. (8c) implies that $PODL→∞$⁠, where $ODL$ signifies this over-diffusive limit. Plus, Eq. (9) reduces to the governing equation for the circuit of this over-diffusive limit.

Alternatively, setting $R2=0$ in each cell causes the branches with $R2$ to behave as short circuits and currents to bypass every $C2$⁠. As a result, the over-diffusive circuit reduces to the Fourier circuit in Ref. [11] that corresponds to $τI, F=0$ and $τV,F=0$⁠, and Eq. (9) reduces to the equation governing the Fourier circuit. Furthermore, for $R2→0$⁠, Eq. (8c) shows that $PF=1$⁠, serving as the lower bound on the phase lag ratio from the viewpoint of over-diffusion. It follows that $1<POD<∞$ for the over-diffusive circuit.

The simulations illustrate DPL behavior using simple ladder circuits for the wave-like and over-diffusive cases. To help identify the DPL mechanisms in these cases, simulations also show behaviors of the ladder circuits after reductions to the hyperbolic and Fourier cases, and the over-diffusive limit. The scope of values for circuit components is not extensive because the DPL behaviors shown here are analogous to those of first-order, continuum DPL heat conduction discussed at length elsewhere (e.g., Refs. [1] and [2]).

Each ladder circuit consists of ten cells, with the first node set at n = 0 and the last node at n = 10. For simplicity, there are no devices (⁠$Dn$⁠, etc.) and associated currents (⁠$IDn=0$⁠, etc.). Also, the initial voltage in each circuit is zero and steady everywhere. At $t=0+$⁠, however, the voltage of the first node sees a step increase to the constant value $V*$⁠, while the voltage of the last node remains fixed at zero.

where $h(ξ)$ is the unit step function. Also, $θn(ξ)=Vn(t)/V*$⁠, $ξ=t/(R1C1)$⁠, and $Δθn=θn+1−2θn$ + $θn−1$⁠. Furthermore, $ΛI,WL=τI,WL/(R1C1)$ and $ΛV,WL=τV,WL/(R1C1)$ are the dimensionless phase lags of current and voltage difference, respectively. This wave-like problem reduces to the hyperbolic and Fourier problems by replacing $ΛI,WL$ and $ΛV,WL$ in Eq. (10a) with the dimensionless phase lags for the hyperbolic (⁠$ΛI,H=τI,H/(R1C1), ΛV,H=0$⁠) and Fourier (⁠$ΛI,F=0, ΛV,F=0$⁠) circuits. Equation (10c) is not needed for the Fourier problem that is first-order in time.

Conveniently, Eqs. (10a)–(10e) also pose the problem for the over-diffusive circuit by updating the dimensionless time and phase lags in these equations so that $ξ=t/[(R1+R2)C1]$⁠, $ΛI,OD=τI,OD/[(R1+R2)C1]$⁠, and $ΛV,OD=τV,OD/[(R1+R2)C1]$⁠. This update accounts for the term $1/[(R1+R2)C1]$ in Eq. (9) of the over-diffusive circuit.

Finally, the over-diffusive problem just described reduces to the problem for the over-diffusive limit by replacing $ΛI,OD$ and $ΛV,OD$ in the updated Eq. (10a) with $ΛI,ODL$ = 0 and $ΛV,ODL=τV,ODL/[(R1+R2)C1]$⁠.

Equation (10c) is not relevant to this over-diffusive limit because its problem is first-order in time.

The essential point here is that the definitions just noted for dimensionless time and dimensionless phase lags of the over-diffusive circuit and over-diffusive limit have different denominators (i.e., scaling) than their counterpart definitions in the hyperbolic, wave-like, and Fourier cases. That is, these denominators are different because they contain different circuit components: $(R1C1)$ versus $[(R1+R2)C1]$⁠. Nevertheless, the component values selected for the simulations provide common scaling for all the circuits. This selection also ensures that the relative behaviors of the circuits in dimensionless terms would remain the same when converted back to actual time and phase lags.

For common scaling, the value of $(R1C1)$ in the hyperbolic, wave-like, and Fourier cases must have the same value as$[(R1+R2)C1]$ in the over-diffusive case and over-diffusive limit. Accordingly, $C1=0.1 μF$ for every circuit. Also, $R1$ = 1 k$Ω$⁠, $R2$ = 1 k$Ω$⁠, and $L$ = 100 mH for the Fourier, hyperbolic, and wave-like circuits, as appropriate. Values for the over-diffusive circuit are $C2$ = 1 μF, $R1$ = 250$Ω$⁠, and $R2$ = 750$Ω$⁠, so that $(R1+R2)=1 kΩ$⁠. For the over-diffusive limit, $C2=1 μF$⁠, $R1$ = 0, and $R2$ = 1 k$Ω$ (again, $R1+R2=1 kΩ$⁠). Also, $V*$ = 5 V for all circuits.

Equations (4a) and (4b), along with Eqs. (8a) and (8b), give the phase lags of the wave-like and over-diffusive circuits. Collected here for convenience, the phase lags for the other circuits are: $τI, H=(L/R1)$⁠, $τV,H=0$⁠; $τI, F=0$⁠, $τV,F=0$⁠; and $τI, ODL=0$⁠, $τV,ODL= R2C2$⁠. Then, for the component values selected here: $τI, H$ = 0.1 ms; $τI,WL$ = 0.2 ms, $τV,WL$ = 0.1 ms; $τI, OD$ = 0.1875 ms, $τV, OD$ = 0.75 ms; and $τV,ODL$ = 1 ms.

For the simulations discussed next, the dimensionless phase lags and their ratios are: $ΛI,H$ = 1, $ΛV,H=0$⁠, $PH$ = 0; $ΛI,WL$ = 2, $ΛV,WL$ = 1, $PWL$ = 0.5; and $ΛI,F$ = 0, $ΛV,F$ = 0, $PF$ = 1. Plus, $ΛI,OD$ = 1.875, $ΛV,OD$ = 7.5, $POD$ = 4; and $ΛI,ODL$ = 0, $ΛV,ODL$ = 10, $PODL→∞$⁠. Appendix  A.2 describes the two independent methods for simulating the circuits. These methods solve the circuit problems posed earlier, and the corresponding results are in agreement.

Figure 2 shows the dimensionless voltage at the center node, $θ5$⁠, versus dimensionless time, $ξ$⁠, for the hyperbolic (⁠$PH$ = 0), wave-like (⁠$PWL$ = 0.5), Fourier (⁠$PF$ = 1), and over-diffusive (⁠$POD$ = 4) circuits, and the circuit for the over-diffusive limit (⁠$PODL→∞$⁠). Although $ξ$ = 0 marks the initial time for each circuit, the vertical axis in the figure is arbitrarily displaced to the left of $ξ=0$ to clearly show the initial rise of voltage for the over-diffusive limit.

Every circuit shows a voltage rise at the center node (n = 5), resulting from the voltage disturbance that propagates into each. This disturbance is triggered by the step increase in voltage for the first node (n = 0) from $θ0$ = 0 to $θ0$ = 1 at $ξ=0+$⁠. The transient voltage at n = 5 for each circuit is representative of behavior at other interior nodes. For the ensuing discussion, the terms voltage rise and voltage disturbance refer to a change in voltage becoming noticeable in the scale of the figure.

The main feature of Fig. 2 is that, as the phase lag ratio increases from $PH$ = 0 toward $PODL→∞$⁠, there is a decrease in the time needed for an initial rise in voltage at n = 5.

In more detail, the hyperbolic circuit (⁠$PH$ = 0) shows the longest time needed (about $ξ$ = 3) for the initial voltage rise. Its time is the longest because the inductor $L$ in each cell (see Fig. 1 with $R2→∞$⁠) initially behaves as an open circuit that temporarily delays current flow through $R1$⁠.

For the wave-like circuit (⁠$PWL$ = 0.5), however, the time needed for the initial voltage rise is less than the time of the hyperbolic case. This wave-like time is less because, during the inductor delay, some current temporarily bypasses $L$ by flowing through $R2$⁠, then into $R1$⁠. Nevertheless, this current through $R2$ gradually approaches zero since $L$ eventually behaves as a short circuit, causing current to bypass $R2$⁠.

Notably, the mechanism of wave-like behavior is the transient division of current between $L$ and $R2$ just described. This mechanism, in turn, causes the time of initial voltage rise for the wave-like circuit to lie between the times for the hyperbolic and Fourier circuits. In fact, increasing the phase lag ratio to the Fourier value (⁠$PF$ = 1) shows a further decrease in the time needed for an initial voltage rise because its circuit has no inductor to delay current flow.

Continuing on to larger phase lag ratios in Fig. 2, the over-diffusive case (⁠$POD$ = 4) shows an additional reduction in the time needed for an initial rise in voltage. This additional reduction occurs because capacitor $C2$ in each cell (see Fig. 1) initially behaves as a short circuit. During this initial behavior, current bypasses $R2$before flowing through $R1$⁠. However, current through $R2$ increases with time because $C2$ eventually behaves as an open circuit.

The important point here is that the transient division of current between $C2$ and $R2$ just noted is the mechanism underlying over-diffusive behavior. Consequently, this mechanism causes the time of initial voltage rise for the over-diffusive circuit to lie between the times of the Fourier circuit and the over-diffusive limit. In particular, the over-diffusive limit (⁠$PODL→∞$⁠) shows the shortest time because, with $R1=0$ in every cell (see Fig. 1), this limit has the least resistance to current flow while $C2$ initially behaves as a short circuit.

Another feature of Fig. 2 is the implied convergence of each circuit to the same voltage after the elapse of enough time. More specifically, by about $ξ$ = 100 (not shown), each voltage converges to $θ5=$ 0.5, corresponding to the same linear, steady-state voltage profile: $θn=(1−n/10)$⁠, n = 0, 1, 2,…,10.

Next, Fig. 3 compares voltage profiles across the circuits at the relatively early time of $ξ$ = 1. That is, soon after the voltage at the first node (n = 0) of each circuit sees the step increase to $θ0$ = 1. Each profile is the voltage connected by straight lines between successive nodes, where voltage for the last node (n = 10) is fixed at $θ10$ = 0. The distance between each node on the horizontal axis in the figure is arbitrary because the discrete circuit equations do not contain length scales.

The key feature of Fig. 3 is that the voltage disturbance triggered at n = 0 increases its depth into the circuits as the phase lag ratio increases from $PH$ = 0 toward $PODL→∞$⁠. For example, the hyperbolic circuit (⁠$PH$ = 0) shows the smallest depth, at n = 2, because $L$ in each cell delays the initial flow of current across the circuit. The circuit for the over-diffusive limit (⁠$PODL→∞$⁠) shows the greatest depth because $C2$ behaves initially as a short circuit, and, with $R1=0$⁠, this circuit is the most conducive to the initial flow of current. Finally, by about $ξ=100$ (not shown), the profile of each circuit converges to the linear profile stated earlier.

Also, Fig. 3 implies that the propagation speeds of voltage disturbances increase along with increasing phase lag ratios, analogous to speeds of thermal disturbances for DPL heating. To see this implication empirically, define $ν=n/ξ$ as the dimensionless propagation speed for a voltage disturbance, where n is the nodal distance traveled by the leading edge of the disturbance and $ξ$ is the corresponding elapsed time. The figure shows that, for instance, n = 3 and n = 7 with the wave-like (⁠$PWL$ = 0.5) and over-diffusive (⁠$POD$ = 4) circuits, respectively. Then, for $ξ=1$⁠, $νWL=3$ and $νOD=7$⁠.

The last remark here is that the dependence of propagation speed on phase lag ratio just noted with Fig. 3 suggests potential applications for the DPL approach in electronics. Suppose, for a moment, that electronic nonlinear oscillators (e.g., van der Pol [13]) are coupled by DPL circuits that have adjustable phase lags. The phase lag ratio, then, might be a convenient tool for controlling propagation speeds between oscillators.

This work has shown theoretically that behavior analogous to first-order, continuum DPL diffusion arises in the idealized, one-dimensional discrete electric circuits introduced here. The mechanisms driving DPL behavior are transient divisions of current between RL components in the wave-like circuit and between RC components in the over-diffusive circuit. One direction for future work is to assess the importance of DPL behavior in more complicated circuits with nonideal components.

The concluding note here is that DPL circuits are also relevant to the study of DPL diffusion in the context of heat, mass, and momentum transfer. Appendix  A.3 provides several preliminary thoughts on connecting the electrical parameters of DPL circuits to the thermal parameters of DPL heat conduction. With this connection, inferring thermal phase lags from electric circuits designed to mimic DPL heat conduction might be more convenient than obtaining phase lags from heat conduction experiments.

Eileen Foy suggested several improvements to the paper. The author received no funding for this work.

There are no conflicts of interest.

The author attests that all data for this study are included in the paper.

b =

length of medium

$C$ =

volumetric heat capacity

$C1$⁠, $C2$ =

capacitors

$D$ =

unspecified device

$h$ =

unit step function

$Ia$⁠, $Ib$⁠, $I1$⁠, $I2$⁠, $I3$ =

currents

$IC1$⁠, $IDn$ =

currents associated with $C1$ and $Dn$

$k$ =

thermal conductivity

L =

inductor

n − 1, n, n + 1, z =

node locations

$P$ =

ratio of phase lags

$q$ =

heat flux

$R1$⁠, $R2$ =

resistors

$S$ =

volumetric rate of energy generation or absorption

$t$ =

time

$T$ =

temperature

$V$ =

voltage

$W$ =

reduced order variable

$x$ =

Cartesian coordinate

Greek Symbols

$α$ =

thermal diffusivity

δ =

unit impulse

δx =

segment width

$Δ$ =

discrete Laplacian operator

$Δξ$ =

dimensionless time step

$θ$⁠, $ψ$ =

dimensionless voltage and dimensionless temperature

$Λ$ =

dimensionless phase lag

$ν$ =

dimensionless propagation speed

$ξ$ =

dimensionless time

$τ$ =

phase lag

Subscripts

$F$ =

Fourier

$H$ =

hyperbolic

$I$ =

relating to current

n−1, n, n+1, z =

node locations

$OD$ =

over-diffusive

$ODL$ =

over-diffusive limit

$V$ =

relating to voltage difference

$WL$ =

wave-like

$0$⁠, $5$⁠, 1$0$ =

first, center, and last node

Superscripts

0 =

initial value

* =

value at n = 0

Reference [12] reports the application of a first-order DPL model to the analysis of transient current and voltage in a one-dimensional, distributed (i.e., continuum) electrical transmission line. Nevertheless, that analysis appears to involve, instead, a reduced form of the first-order model.

The reduction becomes clear by first noting that Eq. (2) in Ref. [12] shows a DPL relation between current and voltage gradient up to second-order in time. The subsequent analysis in Ref. [12] retains terms up to only first-order. Second, Ref. [12] specifies an identical phase lag, $τ$⁠, for the current and voltage gradient in its Eq. (2). Finally, this identical phase lag reduces the first-order DPL model in Ref. [12] to a Fourier-type model (Tzou 2015, 73). This Fourier-type model is Ohm's law where, for example, a current applied to a conductor at time $t+τ$ causes a change to the voltage gradient in the conductor at the same time $t+τ$ (i.e., immediate response).

The first method for simulating the circuits was the simple Euler technique [14] that marched forward in time, using first-order finite difference approximations for the time derivatives. The technique was coded in fortran to solve the corresponding problems posed by Eqs. (10a)–(10e). For all problems, the dimensionless time-step was set to $Δξ$ = 1 × 10⁻⁵ after convergence studies showed that smaller steps altered voltage predictions by less than 0.01%.

More specifically, the Fourier problem was first-order in time and its voltage predictions for interior nodes were obtained explicitly at each time-step. Although the problem for the over-diffusive limit was also first-order in time, it required the simultaneous solution of the finite difference equations by iteration at each time-step for the interior voltages. This simultaneous solution was required because the interior voltages appeared implicitly in the finite difference approximations of the time derivatives in Eq. (10a). The convergence criterion for successive iterations with this over-diffusive limit was set to 1 × 10⁻¹⁴ after smaller criteria showed no noticeable changes in iterated voltages.

In contrast to the two problems just described, the problems for the hyperbolic, wave-like, and over-diffusive circuits were second-order in time. However, the transformation $Wn(ξ)=dθn/dξ$ reduced these second-order problems to first-order in time. Subsequently, the voltage at each interior node was governed by a pair of equations for $Wn$ and $θn$ that were solved simultaneously at each time-step subject to the initial condition, $Wn(0)=0$⁠, at every node. Furthermore, the boundary condition on $Wn$ at the first node was $W0=δ (ξ)$⁠, where $δ (ξ)$ was the unit impulse function stemming from $dh(ξ)/dξ=δ (ξ)$⁠; see Eq. (10d) for the inclusion of $h(ξ)$⁠. This impulse function was approximated at the first time-step by $1/Δξ$⁠, then set to $δ (ξ)=0$ afterwards because $W0=0$ at subsequent time-steps. Finally, the boundary condition at the last node was $W10(0)=0$⁠.

The second method to simulate the circuits used the freely available microcap 12 software [15] with its default settings. Conveniently, after the circuit schematics were drawn in its graphical-user-interface, the software internally assembled the governing equations of the circuits. Then, the software solved the corresponding problems posed with initial conditions of zero voltage.

To set the boundary conditions, the last node in each circuit was fixed at zero voltage. Plus, the pulse-type voltage source at the first node in each circuit was specified with a rise time of 10 ns to approximate the step increase to 5 V there. After that step increase, the voltage at the first node was maintained at 5 V. No noticeable changes in voltage predictions occurred with smaller rise times.

Importantly, the default tolerance of 1 × 10⁻³ for convergence of the internal solver in microcap 12 (termed RELTOL) was retained because smaller values did not produce any noticeable changes in voltage predictions. In addition, the maximum time-step was fixed at 1 ns after convergence studies showed that smaller values for this maximum did not produce noticeable changes in the predictions. The predictions of this second simulation method confirmed those of the first method.

Connecting the electrical parameters of the DPL circuit in Fig. 1 to the thermal parameters of DPL heat conduction takes advantage of the analogies between the circuit equations and Eq. (2) for heat conduction. The general approach toward making this connection is to rewrite Eq. (2) in a discrete dimensionless form, then compare this form to the dimensionless circuit equations of Eq. (10a). After that, selecting appropriate values for the circuit components renders an equivalence between the electrical and thermal cases.

In more detail, imagine that Eq. (2) governs DPL heat conduction in a one-dimensional medium that extends from $x=$0 to $x=b$⁠. Then, discretize the medium into segments of equal width $δx$ between successive node pairs n − 1 and n, and so on for node pairs across the medium. This discretized medium represents a thermal lattice with node temperatures of $Tn−1$⁠, $Tn$⁠, $Tn+1$⁠, etc. For the case of no energy generation or absorption in the medium, this thermal lattice serves as the counterpart of the discrete electrical lattice in Fig. 1 with device currents (⁠$IDn$⁠, etc.) set to zero there.

where $ΔTn=Tn+1−2Tn+Tn−1$⁠. Comparing Eq. (A1) to Eqs. (6) and (9) suggests that $α/(δx)2$ is equivalent to $1/(R1C1)$ and $1/[(R1+R2)C1$] for the wave-like and over-diffusive circuits, respectively.

with $Δψn=ψn+1−2ψn+ψn−1$⁠. After dividing the thermal lattice into, say, ten segments so that $n=0, 1, 2, …,10$⁠, the initial and boundary conditions for Eq. (A2) are stated by Eqs. (10b)–(10e) after substituting $ψn$ for $θn$ there. The key point is that after imposing the constraints of $Λq=ΛI,WL$and $ΛT=ΛV,WL$⁠, the solutions to the thermal and electrical problems posed by Eqs. (A2) and (10a), subject to their boundary and initial conditions, are the same in the sense of similitude.

To provide an example of making the connections between thermal and electrical parameters, the case of wave-like heating in a graphene slab [16] is adopted here. In this case, $b$= 2.5 μm, so dividing the slab into ten segments gives $δx$ = 0.25 μm. The thermal parameters of the graphene at a temperature of 100 K are $α$ = 0.015 m²/s, $τq=$ 300 ps, and $τT=$ 2.5 ps, giving the phase lag ratio of $P=$8.3 × 10⁻³. The dimensionless thermal phase lags for the graphene are $Λq$ = 72.0 and $ΛT$ = 0.6.

Now, turning to electrical parameters, the required constraints are $ΛI,WL$ = 72.0 and $ΛV,WL$ = 0.6. Starting with $τI,WL$ = 300 ps and $τV,WL$ = 2.5 ps, suppose that $R1$ = 10$Ω$⁠. Then, for example, using $ΛI,WL=τI,WL/(R1C1)$⁠, it follows that $C1≈$0.4 pF. Also, with $PWL$ = 8.3 × 10⁻³, Eq. (4c) shows that $R2 ≈$ 1.2 k$Ω$⁠, and Eq. (4b) leads to $L ≈$ 3 nH. A practical note here is that these values for $R2$⁠, $C1$⁠, and $L$ have been very slighted adjusted to coincide with values that are routinely available from suppliers of electrical components (e.g., Ref. [17]). Finally, assigning the values for $R1$⁠, $R2$⁠, $C1$⁠, and $L$ to the electrical lattice of Fig. 1 with ten DPL cells renders that lattice equivalent to the thermal lattice of the graphene. These discrete thermal and electrical lattices approach their continuous forms with successively smaller values of $δx$⁠. A closing note is that the component values just cited pertain to the idealized circuit in Fig. 1. Future efforts need to address realistic issues such as intrinsic resistance of the inductors.