The transferring of thin chip from donor to receptor plays a critical role in advanced electronic package, and the productivity is determined by the interfacial behavior between chip and substrate during chip transferring. The paper investigates analytical competing fracture model of chip–adhesive–substrate structure in thin-chip transferring (peeling-off and placing-on), to discover the critical process condition for distinguishing the interfacial delamination and chip crack. The structure is continuously subjected to ejecting needle, vacuum pick-up head, and wafer fixture, which leads to concentrated and distributed loads and dynamic boundary conditions. Additionally, two criterions based on competing fracture model are presented to determine the extreme chip dimension for peeling-off and the elimination of residual stress for placing-on. The theoretical results are validated by the finite-element simulation with virtual crack-closure technique (VCCT). This paper provides an insight for process optimization, to improve the success ratio and productivity of chip transferring.

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