The thermal management of the increasing fast chips has been a major concern in packaging of micro/nano systems [1]. These chips are squeezing into tighter and tighter spaces with no enough places for heat to dissipate. It is expected that heat flux levels in excess of 100 W/cm2 for commercial electronics and over 1000 W/cm2 for selected military high power electronics will soon become a realistic challenge to overcome. Meanwhile, high-capacity cooling options remain limited for many small-scale applications such as micro-systems, sensors and actuators, and micro/nano electronic components.

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