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Proceedings Papers

Fabrication of Sub-Micron Silicon Vias by Deep Reactive Ion Etching

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Shawn X. D. Zhang, Ronald Hon, S. W. Ricky Lee
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 947-953, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73299
https://doi.org/10.1115/IPACK2005-73299
View Paper titled, Fabrication of Sub-Micron Silicon Vias by Deep Reactive Ion Etching
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Topics: Manufacturing, Reactive-ion etching, Silicon, Microelectromechanical systems, Microfabrication, Etching, Packaging
Proceedings Papers

Use of Array Capacitors to Improve the Power Delivery Performance of a Microprocessor System

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Kimberly D. Eilert, Kaladhar Radhakrishnan, Michael J. Hill, Kemal Aygu¨n
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 955-958, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73301
https://doi.org/10.1115/IPACK2005-73301
View Paper titled, Use of Array Capacitors to Improve the Power Delivery Performance of a Microprocessor System
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Topics: Capacitors, Frequency response, Modeling, Optimization, Simulation models
Proceedings Papers

Mechanical Modeling of a Solder Thermal Interface Material: Implications for Thermo-Mechanical Reliability

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Sankara J. Subramanian
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 959-963, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73304
https://doi.org/10.1115/IPACK2005-73304
View Paper titled, Mechanical Modeling of a Solder Thermal Interface Material: Implications for Thermo-Mechanical Reliability
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Topics: Finite element model, Modeling, Reliability, Solders, Thermomechanics, Cracking (Materials), Fracture (Process), Testing, Brittleness, Corners (Structural elements)
Proceedings Papers

On Measurement of Effective Silicon Backend Strength Using Bump Pull/Shear Techniques

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Sandeep Sane, Shalabh Tandon, Biju Chandran, Tsgereda Alazar, Leonard R. Sorenson
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 965-969, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73306
https://doi.org/10.1115/IPACK2005-73306
View Paper titled, On Measurement of Effective Silicon Backend Strength Using Bump Pull/Shear Techniques
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Topics: Shear (Mechanics), Silicon, Manufacturing, Failure mechanisms, Stress, Failure, Reliability, Calibration, Delays, Failure analysis
Proceedings Papers

An Overview of System in Package (SiP) Applications and Technologies for CPU and Communications Systems

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Lesley Polka, Ravi Mahajan, Johanna Swan, Gaurang Choksi
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 971-975, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73320
https://doi.org/10.1115/IPACK2005-73320
View Paper titled, An Overview of System in Package (SiP) Applications and Technologies for CPU and Communications Systems
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Topics: System-in-package, Architecture, Industrial research, Packaging
Proceedings Papers

MX2 Processor Module: Twice the Processors in Half the Volume

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Christian Belady, Gary Williams, Shaun Harris
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 977-981, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73321
https://doi.org/10.1115/IPACK2005-73321
View Paper titled, MX2 Processor Module: Twice the Processors in Half the Volume
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Topics: Computers, Cooling, Design, Engineers, Fillers (Materials), Packaging, Power converters, Teams, Thermal resistance
Proceedings Papers

Analytical and Experimental Characterization of Bonding Over Active Circuitry

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Li Zhang, Vijaylaxmi Gumaste, Anindya Poddar, Luu Nguyen, Gary Schulze
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 983-991, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73328
https://doi.org/10.1115/IPACK2005-73328
View Paper titled, Analytical and Experimental Characterization of Bonding Over Active Circuitry
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Topics: Bonding, Experimental characterization, Stress, Fracture (Materials), Wire bonding, Aluminum, Computer simulation, Cracking (Materials), Damage, Design
Proceedings Papers

Chip Scale Package for Image Sensor Device

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Yung-Ching Chao, John Liu, Yao-Jung Lee, De-Shin Liu, Jeff Wang, Ching-Yang Chen, Sam Huang, Alex Lu
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 993-998, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73329
https://doi.org/10.1115/IPACK2005-73329
View Paper titled, Chip Scale Package for Image Sensor Device
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Topics: Sensors, Bonding, Flip-chip, Flip-chip devices, Manufacturing, Metals, Optical glass, Reliability, Sealing (Process), Semiconductor wafers
Proceedings Papers

Electrical Simulation Design Technology of Silicon Through Substrate

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Takamasa Takano, Masataka Yamaguchi, Koichi Nakayama, Tomoko Maruyama, Shigeki Chujyo, Satoru Kuramochi, Yoshitaka Fukuoka
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 999-1004, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73339
https://doi.org/10.1115/IPACK2005-73339
View Paper titled, Electrical Simulation Design Technology of Silicon Through Substrate
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Topics: Design, Silicon, Simulation, Packaging, System-in-package, Transmission lines, Cables, Circuits, Clocks, Delays
Proceedings Papers

Mechanical Design and Analysis of Land Grid Array (LGA) Sockets

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Vinayak Pandey, Sankara Subramanian, Sudarshan Rangaraj, Tod Byquist
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1005-1011, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73360
https://doi.org/10.1115/IPACK2005-73360
View Paper titled, Mechanical Design and Analysis of Land Grid Array (LGA) Sockets
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Topics: Accelerated life testing, Ball-Grid-Array packaging, Computer simulation, Design, Design engineering, Manufacturing, Optimization, Pins (Engineering), Reliability, Shock (Mechanics)
Proceedings Papers

Thermal-Fatigue Life Prediction Equation for Plastic Ball Grid Array (PBGA) SnAgCu Lead-Free Solder Joints

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John Lau, S. W. Ricky Lee, Fubin Song, Dongkai Shangguan, Dennis C. Lau, Walter Dauksher
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1013-1019, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73362
https://doi.org/10.1115/IPACK2005-73362
View Paper titled, Thermal-Fatigue Life Prediction Equation for Plastic Ball Grid Array (PBGA) SnAgCu Lead-Free Solder Joints
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Topics: Ball-Grid-Array packaging, Fatigue, Lead-free solders, Alloys, Failure mechanisms, Vehicles
Proceedings Papers

A Systematic Approach for Determining the Thermal Fatigue-Life of Plastic Ball Grid Array (PBGA) Lead-Free Solder Joints

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John Lau, Ricky Lee, Walter Dauksher, Dongkai Shangguan, Fubin Song, Dennis Lau
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1021-1029, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73364
https://doi.org/10.1115/IPACK2005-73364
View Paper titled, A Systematic Approach for Determining the Thermal Fatigue-Life of Plastic Ball Grid Array (PBGA) Lead-Free Solder Joints
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Topics: Ball-Grid-Array packaging, Fatigue life, Lead-free solders, Reliability, Design, Fatigue, Manufacturing
Proceedings Papers

A Paradigm Shift in the Development of Chemical Mechanical Polishing (CMP): Cost-Effective CMP Planarization in Next Generation Substrate/Package Design and Manufacturing

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Stefanie Lotz, Robert Baresel, Dipto Thakurta, Lei Jiang, Tuhin Ghosh
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1031-1036, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73371
https://doi.org/10.1115/IPACK2005-73371
View Paper titled, A Paradigm Shift in the Development of Chemical Mechanical Polishing (CMP): Cost-Effective CMP Planarization in Next Generation Substrate/Package Design and Manufacturing
Open the PDF for A Paradigm Shift in the Development of Chemical Mechanical Polishing (CMP): Cost-Effective CMP Planarization in Next Generation Substrate/Package Design and Manufacturing in another window
Topics: Design, Manufacturing, Polishing, Slurries, Copper, Recycling, Computer-aided design, Data collection, Density, Electroplating
Proceedings Papers

Development of Lead-Free Compatible Molded Underfill (MUF) Materials for Flip Chip Stacked Packaging: Key Challenges and Learnings

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Vassou LeBonheur, Choong Kooi Chee
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1037-1044, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73373
https://doi.org/10.1115/IPACK2005-73373
View Paper titled, Development of Lead-Free Compatible Molded Underfill (MUF) Materials for Flip Chip Stacked Packaging: Key Challenges and Learnings
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Topics: Flip-chip, Packaging
Proceedings Papers

Dual Die Package Design Strategy and Performance

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Mahadevan Suryakumar, Lu-Vong T. Phan, Mathew Ma, Wajahat Ahmed
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1045-1051, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73391
https://doi.org/10.1115/IPACK2005-73391
View Paper titled, Dual Die Package Design Strategy and Performance
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Topics: Design, Leakage, Clocks, Cycles, Energy efficiency, Packaging
Proceedings Papers

Characterization of Fine Pitch CSP Solder Joints Under Board-Level Free Fall Drop (BFFD)

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Dongji Xie, David Geiger, Dongkai Shangguan, Daniel T. Rooney, Louis J. Gullo
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1053-1062, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73484
https://doi.org/10.1115/IPACK2005-73484
View Paper titled, Characterization of Fine Pitch CSP Solder Joints Under Board-Level Free Fall Drop (BFFD)
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Topics: Solder joints, Failure, Finite element analysis, Lumber, Failure analysis, Failure mechanisms, Metals, Probability, Screws, Stress
Proceedings Papers

Failure Site Transition During Drop Testing of Printed Wiring Assemblies

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J. Varghese, A. Dasgupta
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 845-848, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73014
https://doi.org/10.1115/IPACK2005-73014
View Paper titled, Failure Site Transition During Drop Testing of Printed Wiring Assemblies
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Topics: Electrical wires, Failure, Testing, Durability, Intermetallic compounds, Solders, Damage, Surface mount packaging, Brittleness, Deformation
Proceedings Papers

Development of Integrated Process-Ageing Modeling Methodology for Flip Chip on Flex Interconnections With Non-Conductive Adhesives

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Xiaowu Zhang, E. H. Wong, Ranjan Rajoo, Mahadevan K. Iyer, J. F. J. M. Caers, X. J. Zhao
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 849-856, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73020
https://doi.org/10.1115/IPACK2005-73020
View Paper titled, Development of Integrated Process-Ageing Modeling Methodology for Flip Chip on Flex Interconnections With Non-Conductive Adhesives
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Topics: Adhesives, Flip-chip, Flip-chip devices, Modeling, Stress, Finite element analysis, Finite element model, Reliability, Temperature, Thermomechanics
Proceedings Papers

Solder Joint Reliability Improvement Using the Cold Ball Pull Metrology

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George F. Raiser, Dudi Amir
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 857-865, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73045
https://doi.org/10.1115/IPACK2005-73045
View Paper titled, Solder Joint Reliability Improvement Using the Cold Ball Pull Metrology
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Topics: Metrology, Nickel, Reliability, Shear (Mechanics), Shock (Mechanics), Solder joints
Proceedings Papers

Simulation of Warpage Considering Both Thermal and Cure Induced Shrinkage During Molding in IC Packaging

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Shiang-Yu Teng, Sheng-Jye Hwang
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 867-872, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73062
https://doi.org/10.1115/IPACK2005-73062
View Paper titled, Simulation of Warpage Considering Both Thermal and Cure Induced Shrinkage During Molding in IC Packaging
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Topics: Integrated circuit packaging, Molding, Shrinkage (Materials), Simulation, Warping, Pressure, Simulation models, Temperature, Thermal expansion