An experimental investigation of a scheme for cooling electronics packaged in a 3D stack arrangement will be presented in this paper. The scheme utilizes immersion cooling of the stacked electronics in an enclosure filled with a dielectric fluid. Convection and conduction within the dielectric fluid drive heat from the 3D stack to the walls of the enclosure from where a ‘synthetic jet /fan air-cooled heat sink’ ultimately dissipates heat to the ambient. Four layers of thick film heaters embedded in FR-4 sheets, each attached to thin copper plates ( innovatively stacked in a pyramidal arrangement for conducting heat laterally to the dielectric fluid and simultaneously promoting natural convection in the fluid ), were used to simulate a 3D stack of electronics. For a comparative study, several runs were carried out, where the enclosure was filled with dielectric fluid (FC-770), FC-770 in combination with copper wool (with a goal of enhancing heat transfer in FC-770), and water. For a 40 W total power input to the stack, it was observed that the thermal resistance for heat dissipation to ambient from the four heaters varied from 1.67 K/W to 1.96 K/W with FC-770, 1.47 K/W to 1.87 K/W with FC-770 combined with copper wool, and 1.06 K/W to 1.50 K/W with water. The proposed cooling solution is passive and scalable, and is demonstrated to be practicable and effective in cooling 3D stacked electronics.

A way of testing the electromigration (EM) resistance of different high purities Al based on atomic flux divergence (AFD) method has been proposed in our previous work. With the theoretical analysis, the EM resistance has been clarified to depend on various parameters which are related with the material properties such as diffusion coefficient and grain size. The present research compares the EM resistance of different high purities Al films with the same thickness of 5μm. For these films, the grain size, which is realized as a factor affecting the resistance, was changed compared with the 1μm thick samples, which have been used in the previous work. A narrow section was shaped in the film by introducing a double-L shaped slit by using a focused-ion-beam (FIB) system. The samples so fabricated were positioned on a ceramic heater with constant temperature, and a high current density was achieved in the narrow section to cause EM. After experiencing the same time for current supply and confirming having the same local temperature by using chemical reagents having known melting points, the different purities samples were observed with a magnified field emission scanning electron microscopy (FE-SEM). In addition, the comparison of the total hillock volume appeared in the sample with the time for current supply is achieved for the samples. It is known that for a given time, a smaller hillock volume corresponds to a higher resistance of the material against EM. Finally, according with the analysis by the synthesis of the obtained EM ranking for the 1 and 5μm thick films, the evaluation of the dominant factor, diffusion coefficient, for EM in high purities Al film deposited by sputtering was approached.

Combining thick-film and printed wiring board processes allows thick-film ceramic resistors and capacitors to be embedded in printed wiring boards (PWB). The resistor materials are based on lanthanum boride and cover the range of 10 ohm/square to 10 Kohm/square resistivities. The capacitor material is based on doped barium titanate. Both systems are designed to be “thick-film” printed on copper foil in the locations desired in the circuit and the foil is then fired in nitrogen at 900°C to form the ceramic component on the copper foil. The foil is then laminated, component face down, to FR4 using standard prepreg. The inner layer is then etched to reveal the components in a FR4 matrix. The resistors can be trimmed to tight tolerance at this stage and the components tested. The inner layer can then be laminated into a multilayer PWB. The process is described and the influence of board design, PWB processing and materials are presented and discussed. Examples of circuits using embedded thick-film passives are shown and results of reliability studies are presented.

This paper is an in depth presentation of a novel approach for design and manufacturing processes to embed ceramic thick film resistors and discrete capacitors into circuit board substrates. These robust materials are available in a wide range of values. Embedded passives, i.e., resistors and capacitors built right into the printed circuit board substrate will be the next pivotal technology for the PCB industry, preceded by the plated thru hole in the 50s, and microvias in the 90s. Key drivers are performance, miniaturization, and cost. The average cell phone has 445 SMT passive components at a 25:1 ratio to ICs. Embedding many of these will improve performance, enable more functionality and reduce cost per function. Embedded passives are not limited to cell phones, many other applications will benefit from improved performance. Several materials are commercially available today and many new materials are in development.

The complexity and performance of the electronic components and systems is increasing and placing greater demands on compact packaging and interconnection technologies. Multilayer thick film technology is one of the important technologies adopted in the miniaturization of electronic systems. Normally only interconnections are made in the intermediate layers. The possibility of fabricating resistors along with interconnections in the intermediate layers using conventional thick film materials using co-firing process has been examined in this paper. Normally multilayer structures are fabricated by printing / drying / firing of each layer separately starting from the bottom most layer (sequential processing). In this process the bottom layers undergo sintering many times. To avoid many firing cycles and to save power and processing time, a study is taken up to examine the effects of co-firing on the multilayer structure with embedded resistors. The results of the study are presented in this paper.