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Proceedings Papers

Double Side System in Package Development Challenge for Heterogeneous Integration

Feng Kao, Yu-Po Wang, Davidlion Wang, Jensen Tsai, Mike Tsai, Ryan Chiu, Eric He
Proc. ASME. InterPACK2019, ASME 2019 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, V001T01A004, October 7–9, 2019
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2019-6354
https://doi.org/10.1115/IPACK2019-6354
View Paper titled, Double Side System in Package Development Challenge for Heterogeneous Integration
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Topics: System-in-package, Molding, Simulation, Accelerated life testing, Copper, Design, Energy dissipation, Internet of things, Manufacturing, Packaging
Proceedings Papers

Thermal Stress Simulation for 3D SiP With TSV Structure Under Unsteady Thermal Loads

Takahiro Kinoshita, Takashi Kawakami, Tomoya Sugiura, Keiji Matsumoto, Sayuri Kohara, Yasumitsu Orii
Proc. ASME. InterPACK2015, Volume 2: Advanced Electronics and Photonics, Packaging Materials and Processing; Advanced Electronics and Photonics: Packaging, Interconnect and Reliability; Fundamentals of Thermal and Fluid Transport in Nano, Micro, and Mini Scales, V002T02A020, July 6–9, 2015
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2015-48142
https://doi.org/10.1115/IPACK2015-48142
View Paper titled, Thermal Stress Simulation for 3D SiP With TSV Structure Under Unsteady Thermal Loads
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Topics: Simulation, Stress, Thermal stresses, Finite element methods, Heat, Temperature, Cooling, Damage, Packaging, Reliability
Proceedings Papers

Inelastic Thermal Stress Simulation for Si Chip and Insulator Around TSV in 3D SiP

Takahiro Kinoshita, Takashi Kawakami, Takeshi Wakamatsu, Shunpei Shima, Keiji Matsumoto, Sayuri Kohara, Fumiaki Yamada, Yasumitsu Orii
Proc. ASME. InterPACK2013, Volume 1: Advanced Packaging; Emerging Technologies; Modeling and Simulation; Multi-Physics Based Reliability; MEMS and NEMS; Materials and Processes, V001T04A009, July 16–18, 2013
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2013-73151
https://doi.org/10.1115/IPACK2013-73151
View Paper titled, Inelastic Thermal Stress Simulation for Si Chip and Insulator Around TSV in 3D SiP
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Topics: Silicon chips, Simulation, Thermal stresses, Stress, Bending strength, Copper, Finite element methods, Yield stress, Brittleness, Elevations (Drawings)
Proceedings Papers

Analytical Modeling of Temperature Distribution in Interposer-Based Microelectronic Systems

Leila Choobineh, Dereje Agonafer, Ankur Jain
Proc. ASME. InterPACK2013, Volume 1: Advanced Packaging; Emerging Technologies; Modeling and Simulation; Multi-Physics Based Reliability; MEMS and NEMS; Materials and Processes, V001T03A004, July 16–18, 2013
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2013-73166
https://doi.org/10.1115/IPACK2013-73166
View Paper titled, Analytical Modeling of Temperature Distribution in Interposer-Based Microelectronic Systems
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Topics: Modeling, Temperature distribution, Thermal management, Temperature, Finite element analysis, Heat transfer, Design, Energy conservation, Fourier series, Heat
Proceedings Papers

TSV Interposers With Embedded Microchannels for 3D IC and LED Integration

John Lau, Heng-Chieh Chien, Ray Tain
Proc. ASME. InterPACK2011, ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 2, 297-304, July 6–8, 2011
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2011-52204
https://doi.org/10.1115/IPACK2011-52204
View Paper titled, TSV Interposers With Embedded Microchannels for 3D IC and LED Integration
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Topics: Microchannels, Silicon, Cooling, Optical instruments, Pressure drop, Structural design, System-in-package
Proceedings Papers

Effects of TSV Interposer on the Reliability of 3D IC Integration SiP

John H. Lau, Xiaowu Zhang
Proc. ASME. InterPACK2011, ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 1, 65-73, July 6–8, 2011
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2011-52205
https://doi.org/10.1115/IPACK2011-52205
View Paper titled, Effects of TSV Interposer on the Reliability of 3D IC Integration SiP
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Topics: Reliability, Corners (Structural elements), Creep, Cycles, Density, Failure analysis, Silicon, Solder joints, Stress, System-in-package
Proceedings Papers

Thermal Stress of Through Silicon Vias and Si Chips in 3D SiP

Takahiro Kinoshita, Takashi Kawakami, Tatsuhiro Hori, Keiji Matsumoto, Sayuri Kohara, Yasumitsu Orii, Fumiaki Yamada, Morihiro Kada
Proc. ASME. InterPACK2011, ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 1, 325-328, July 6–8, 2011
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2011-52241
https://doi.org/10.1115/IPACK2011-52241
View Paper titled, Thermal Stress of Through Silicon Vias and Si Chips in 3D SiP
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Topics: Silicon, Silicon chips, Thermal stresses, Stress, Copper, Crystals, Damage, Reliability, Yield stress, Cycles
Proceedings Papers

Signal Integrity Analysis for RF System-in-Package

Jeff Chen, Weiping Li, Feng Ling
Proc. ASME. InterPACK2011, ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 1, 671-674, July 6–8, 2011
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2011-52282
https://doi.org/10.1115/IPACK2011-52282
View Paper titled, Signal Integrity Analysis for RF System-in-Package
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Topics: Signals, System-in-package, Design methodology, Architects, Design, Electromagnetic compatibility, Engineering simulation, Noise (Sound), Packaging, Simulation
Proceedings Papers

The Most Cost-Effective Integrator (TSV Interposer) for 3D IC Integration System-in-Package (SiP)

John H. Lau
Proc. ASME. InterPACK2011, ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 1, 53-63, July 6–8, 2011
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2011-52189
https://doi.org/10.1115/IPACK2011-52189
View Paper titled, The Most Cost-Effective Integrator (TSV Interposer) for 3D IC Integration System-in-Package (SiP)
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Topics: System-in-package, Polishing equipment, Reliability, Thermal management
Proceedings Papers

Effects of TSV (Through Silicon Via) Interposer/Chip on the Thermal Performances of 3D IC Packaging

John H. Lau, Gong Yue Tang, Germaine Yen Yi Hoe, Xiao Wu Zhang, Tai Chong Chai, Pinjala Damaruganath, Kripesh Vaidyanathan
Proc. ASME. InterPACK2009, ASME 2009 InterPACK Conference, Volume 1, 67-74, July 19–23, 2009
Publisher: American Society of Mechanical Engineers
Paper No: InterPACK2009-89380
https://doi.org/10.1115/InterPACK2009-89380
View Paper titled, Effects of TSV (Through Silicon Via) Interposer/Chip on the Thermal Performances of 3D IC Packaging
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Topics: Integrated circuit packaging, Silicon, Computational fluid dynamics, Aluminum, Copper, Design, Fillers (Materials), Heat transfer, Junctions, Polymers
Proceedings Papers

Effect of Underfilling Materials and Processes on the Reliability of System in Package

Tae Hyun Kim, Sung Yi, Jae Ky Roh, Chang Mu Jung, Yan Shuang Guo, Jae Chun Do, Jin Gu Kim, Shan Guo, Jupyo Hong
Proc. ASME. InterPACK2007, ASME 2007 InterPACK Conference, Volume 2, 1-8, July 8–12, 2007
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2007-33034
https://doi.org/10.1115/IPACK2007-33034
View Paper titled, Effect of Underfilling Materials and Processes on the Reliability of System in Package
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Topics: Reliability, System-in-package, Manufacturing, Solders, Adhesion, Computer simulation, Crystals, Delamination, Dimensions, Failure mechanisms
Proceedings Papers

Thermal Management on Hot Spot Elimination / Junction Temperature Reduction for High Power Density System in Package Structure

Chan-Yen Chou, Chung-Jung Wu, Hsiu-Ping Wei, Ming-Chih Yew, Chien-Chia Chiu, Kuo-Ning Chiang
Proc. ASME. InterPACK2007, ASME 2007 InterPACK Conference, Volume 1, 227-232, July 8–12, 2007
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2007-33534
https://doi.org/10.1115/IPACK2007-33534
View Paper titled, Thermal Management on Hot Spot Elimination / Junction Temperature Reduction for High Power Density System in Package Structure
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Topics: Junctions, Power density, System-in-package, Temperature, Thermal management, Heat, Metals, Design, Slug flows, Solders
Proceedings Papers

An Overview of System in Package (SiP) Applications and Technologies for CPU and Communications Systems

Lesley Polka, Ravi Mahajan, Johanna Swan, Gaurang Choksi
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 971-975, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73320
https://doi.org/10.1115/IPACK2005-73320
View Paper titled, An Overview of System in Package (SiP) Applications and Technologies for CPU and Communications Systems
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Topics: System-in-package, Architecture, Industrial research, Packaging
Proceedings Papers

Predicting Technique of Delamination at Adhesively Bonding Joints in a Flip Chip Package During Solder Reflow Process

Toru Ikeda, Won-Keun Kim, Noriyuki Miyazaki
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1167-1175, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73153
https://doi.org/10.1115/IPACK2005-73153
View Paper titled, Predicting Technique of Delamination at Adhesively Bonding Joints in a Flip Chip Package During Solder Reflow Process
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Topics: Bonding, Delamination, Flip-chip packages, Reflow soldering, Flip-chip, Flip-chip devices, Reliability, Fracture (Materials), Solder joints, Stress
Proceedings Papers

Electrical Simulation Design Technology of Silicon Through Substrate

Takamasa Takano, Masataka Yamaguchi, Koichi Nakayama, Tomoko Maruyama, Shigeki Chujyo, Satoru Kuramochi, Yoshitaka Fukuoka
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 999-1004, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73339
https://doi.org/10.1115/IPACK2005-73339
View Paper titled, Electrical Simulation Design Technology of Silicon Through Substrate
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Topics: Design, Silicon, Simulation, Packaging, System-in-package, Transmission lines, Cables, Circuits, Clocks, Delays
Proceedings Papers

Evaluation of Spiral Inductors Embedded in Low Temperature Co-Fired Ceramic Substrates

Woon Choi, Shintaro Ono, Seiichiro Yoshida, Hajime Tomokage
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1989-1993, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73469
https://doi.org/10.1115/IPACK2005-73469
View Paper titled, Evaluation of Spiral Inductors Embedded in Low Temperature Co-Fired Ceramic Substrates
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Topics: Ceramics, Inductors, Low temperature, Design, Simulation results, Microscopes, Lasers, Microwaves, System-in-package
Proceedings Papers

Modeling Melting Solder in System-in-Package Assembly

J. F. Zhao, J. F. Wang, C. Yang
Proc. ASME. InterPACK2005, Advances in Electronic Packaging, Parts A, B, and C, 1455-1458, July 17–22, 2005
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2005-73237
https://doi.org/10.1115/IPACK2005-73237
View Paper titled, Modeling Melting Solder in System-in-Package Assembly
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Topics: Manufacturing, Melting, Modeling, Solders, Stress, System-in-package
Proceedings Papers

Chip in Polymer: 3D Integration of Active Circuitry in Polymeric Substrate

Erik Jung, Dirk Wojakowski, Alexander Neumann, Andreas Ostmann, Rolf Aschenbrenner, Herbert Reichl
Proc. ASME. InterPACK2003, 2003 International Electronic Packaging Technical Conference and Exhibition, Volume 1, 47-51, July 6–11, 2003
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2003-35025
https://doi.org/10.1115/IPACK2003-35025
View Paper titled, Chip in Polymer: 3D Integration of Active Circuitry in Polymeric Substrate
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Topics: Bricks, Electronic products, Laminates, Manufacturing, Microelectromechanical systems, Polymers, Silicon, Silicon chips, System-in-package, Thermal management
Proceedings Papers

Characterization of Vertical Interconnects in 3-D System in a Package

Qinghua Kang, Altan M. Ferendeci
Proc. ASME. InterPACK2003, 2003 International Electronic Packaging Technical Conference and Exhibition, Volume 2, 13-18, July 6–11, 2003
Publisher: American Society of Mechanical Engineers
Paper No: IPACK2003-35247
https://doi.org/10.1115/IPACK2003-35247
View Paper titled, Characterization of Vertical Interconnects in 3-D System in a Package
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Topics: System-in-package, Circuits, Microwaves, Microelectromechanical systems, Dimensions, Junctions, Microfabrication, Millimeter waves, Transmission lines, Wavelength