Forests comprised of nominally vertically aligned carbon nanotubes (CNTs) are excellent candidates for thermal interface materials (TIMs) due to their theoretically predicted outstanding thermal and mechanical properties. Unfortunately, due to challenges in the synthesis and characterization of these materials reports of the thermal conductivity and thermal contact resistance of CNT forests have varied widely and typically fallen far short of theoretical predictions. In particular, the micro- and nano-length scales characteristic of the heat transfer in CNT forests pose significant challenges and may lead to misreported results. Here we examine the ability of a popular and well-established thermal metrology technique, time-domain thermoreflectance (TDTR), to resolve the properties of CNT forest TIMs. The characteristic heating frequencies of TDTR (1–10 MHz) are used to probe heat transfer at length scales spanning ∼0.1–1 μm, applicable for measuring the contact resistance between the CNT forest free tips and an opposing substrate. We identify the range of CNT forest-opposing substrate interface resistances that can be resolved with TDTR, and simultaneously demonstrate the effectiveness of several processes developed to reduce the resistance of these interfaces. The limitations of characterizing CNT forests with TDTR are discussed in terms of uncertainty and sensitivity to parameters of interest.

This paper describes the effects of specimen size, focused ion beam (FIB) induced damage, and annealing on the mechanical properties of sub-100nm-sized silicon (Si) nanowires (NWs) that were evaluated by means of uniaxial tensile testing. Si NWs were made from silicon-on-nothing membranes that were produced by deep reactive ion etching trench fabrication and ultra-high vacuum (UHV) annealing. FIB system’s probe manipulation and film deposition functions were used to fabricate Si NWs and to directly bond them onto the sample stage of a tensile test device. The mean Young’s modulus and the mean strength of FIB-damaged NWs were 131.0 GPa and 5.6 GPa, respectively. After 700°C and 1000°C annealing in UHV, the mean Young’s modulus was increased to 168.1 GPa and 169.4 GPa, respectively, due to recrystallization by annealing. However, the mean strength was decreased to 4.1 GPa and 4.0 GPa, respectively. These experimental facts imply that the crystallinity of NWs improved, but the morphology was degraded. The surface degradation was probably related to gallium ion implantation into NWs surface during FIB fabrication.

Laser measurement and laser processing techniques have been gaining strong attention from various applications [1,2]. This research aims at the development of a fluidic laser beam shaper, and in order to fulfill the objective, characteristics of the thermal lens effect are studied. This phenomenon has the optical property of a concave lens since the refractive index distribution on the optical axis is formed when the liquid is irradiated. One reason for the refractive index distribution in the liquid is the temperature distribution in the liquid when it is irradiated. In this research, effects of the pump power and propagation distance of the probe beam to probe beam profile are investigated experimentally and theoretically, in order to develop fluidic laser beam shaper. It is indicated that, by controlling some parameters in thermal lens system as pump power (in the regime of linear optics) and absorption coefficient, input Gaussian beam can be converted into flat-top beam profile. The relationship among the distance to obtain a flat-top beam, pump power and absorption coefficient is investigated to show the flexibility of fluidic laser beam shaper in many fields of laser application.

Reliability has been studied in the PV industry using a variety of experimental and modeling techniques, to probe specific aspects of design and performance. In this paper, a methodology that integrates experimental and modeling techniques to enable risk mitigation in the development cycle and reliability estimation is presented.

Network Identification by Deconvolution (NID) method is applied to the analysis of the thermal transient pulsed laser heating. This is the excitation used in many optical experiments such as the Pump-Probe Transient Thermoreflectance experiment. NID method is based on linear RC network theory using Fourier’s law of heat conduction. This approach is used to extract the thermal time constant spectrum of the sample after excitation by either a step or pulsed heat source at one surface. Furthermore, using network theory mathematical transformations, the details of the heat flux path through the sample can be analyzed. This is done by introducing the cumulative and differential structure functions. We show that the conventional NID method can be modified to analyze transient laser heating experiments. The advantage is that the thermal resistance of the top material layers and the major interface thermal resistances can be extracted without the need of assuming a specific multilayer structure. Some of the limitations due to the finite thermal penetration depth of the transient heat pulse will be discussed.

In order to develop a new structure microwave probe, the fabrication of the atomic force microscope (AFM) probe on a GaAs wafer was studied. The fabricated probe had a tip of 8 μm high and curvature radius approximately 30 nm. The dimensions of the cantilever are 250 × 30 × 15 μm. A waveguide was introduced by evaporating Au film on the top and bottom surfaces of the GaAs AFM probe. The open structure of the waveguide at the tip of the probe was introduced by using focused ion beam (FIB) fabrication. To improve the resolution of AFM measurement, only the metal film was removed at the end of the probe tip. AFM topography of a grating sample was measured by the fabricated probe. As a result, it was found that the resolution of AFM measurement and the ratio of signal to noise were enhanced.

Two-phase microfluidic heat sinks promise high heat flux cooling at reduced pumping power compared to pumped liquid microchannel heat sinks. However, flow instabilities caused by bubble nucleation and expansion severely reduce heat transfer performance of two-phase microfluidic heat sinks. This study probes the governing physics of bubble nucleation and expansion by comparing the effects of pulsed heating to steady-state heating in a single microchannel. Pulsed heating at 8 Hz causes an increase in the average hotspot temperature of as much as 8°C compared to steady-state heating. Upstream and downstream temperature response does not vary significantly between heating conditions. The results correspond well with thin-film evaporation models for bubble growth. This study provides insight for designing two-phase microfluidic cooling system subjected to transient hotspots.

In order to develop a new structure microwave probe, the fabrication of AFM probe on the GaAs wafer was studied. A waveguide was introduced by evaporating Au film on the top and bottom surfaces of the GaAs AFM probe. A tip having 7 μm high, 2.0 aspect ratio was formed. The dimensions of the cantilever are 250×30×15 μm. The open structure of the waveguide at the tip of the probe was obtained by using FIB fabrication. AFM topographies of a grating sample were measured by using the fabricated GaAs microwave probe and commercial Si AFM probe. The fabricated probe was found having similar capability as the commercial one.

A failure mechanism of pogo-type probe pin is investigated. A probing tester with actuation capable in three-axes is used to simulate the actual inspection process experimentally. Force required to break in surface oxides and develop electrical contact is measured. Contact resistance history reveals that pins mating to Sn surfaces fail earlier than SnPb surfaces. Through periodic inspection of pin using microprobe/EDS as a function of probing count, the general root cause of pin failure is turned out to be pin tip wear out associated with Sn oxide growth on its surface. The cause of earlier failure of the pin probing matte Sn surface is identified as severe wear out by a rough and abrasive characteristic of matte Sn.

The junction-to-case thermal resistance or Theta_JC is one of the important metrics used to evaluate the performance and reliability of a particular electronic package. Currently, there is no established JEDEC standard for a Theta_JC test fixture. This paper presents the results of computational fluid dynamic (CFD) modeling studies carried out to propose a simple and robust Theta_JC fixture. The theoretical Theta_JC value for a particular package was first obtained assuming idealized conditions. The model was then modified to incorporate actual fixture conditions. The objective is to design a tester fixture that reduces the Theta_JC measurement error, i.e. ideal vs. fixture. The effect of various design parameters on the measured Theta_JC value was investigated. Sensitivity studies included cavity or insulation configuration, cold plate size, thermocouple probe orientation, thermal interface materials, and applied power. Modeling results showed that, regardless of the insulation design, there was considerable heat loss through the test board on which the package was mounted. This resulted in a lower Theta_JC value measured, with errors up to 30%. To reduce the heat loss and measurement error, a heater was mounted at the bottom of the board and maintained at a temperature within 1 to 2°C of the junction temperature. Using this simple approach, the measurement error was reduced to around 6%. From the results of the study, an optimized prototype fixture design is proposed.

In order to develop a new structure microwave probe, the fabrication of micro tip on the GaAs wafer surface was studied. The effects of the shape, direction, and size of etching mask to the fabricated tip were discussed in details. By finding the most suitable etching conditions, a tip having 7 μm high, 1.4 aspect ratio, and 50 nm curvature radius was formed. The experimental result indicates that the tip having the similar capability to sense the surface topography of materials as that of commercial atom force microscope (AFM) probe.

The bandwidth provided by optical interconnects makes them an attractive solution for chip-to-package and chip-to-chip communications. In such systems, chips will have optical I/O interconnects fabricated alongside their conventional electrical counterparts. Virtually no work has been previously reported relating to the testing of such chips at the wafer-level. The requirements for probe hardware needed to achieve this are identified, and probe module configurations based on these requirements are presented. A high-density micro-opto-electro-mechanical-systems (MOEMS)-based probe substrate prototype for interfacing with chips having electrical and optical polymer pillar-based I/Os has been designed, and built using microfabrication techniques. Successful probing of an array of polymer pillar-based optical I/Os is reported.

A microscopic four-point atomic force microscope (AFM) probe with concomitant experimental technique for local conductivity measurement is presented. A silicon nitride based AFM contact-mode probe with a V-shaped tip, which patterned by using the conventional photolithography method, is selected. The probe is then etched to four parallel isolated electrodes for the purpose of performing current input and electrical potential drop measurement. The new probe not only inherits the function of surface topography generating but also has the capability of characterizing the local conductivity simultaneously. The nanoresolution position control mechanism of AFM allows the probe scanning across micrometers sized area and creating high spatial resolution map of the in-plane conductivities. Experiments have shown the microscopic four-point probe to be mechanically flexible and robust. The repeatable conductivity measurements on the surface of aluminum and indium tin oxide (ITO) thin films indicate the technique has potential application for characterizing the devices and materials in microscale.

Previous publications showed the potential of gold nanoparticle inks in microelectronic manufacturing. The main advantage of using nanoparticles for the production of microelectronic conductors is their low melting point. Indeed the melting point of gold nanoparticles decreases dramatically with decreasing size. This interesting property presents us with an uncomplicated way in which to produce electronic conductors on plastics, thus manufacture flexible electronics. Microelectronic applications which make use of materials other than silicon make their appearance ever more often. In this paper we present a method of manufacturing multilayered electronic circuits using a scanning-probe-inspired technology to deposit and anneal a gold nanoink on various substrates. We then tested the quality of this technology by applying it to a real complete electronic circuit.

An ongoing trend in packaging technology is the introduction of optical interconnections to cope with the problems of increased data transmission speed and the raised interconnection density. Hence, improving packaging and interconnection technologies is only viable if the aspects of optical interfaces and opto-electronic (O/E) components are considered. In this paper, we will demonstrate an MCM-D technology with O/E features. We achieved to integrate high-precision V-grooves for alignment and fixation of the optical fibers into a standard MCM-D technology. The V-groove shape of the fiber fixation structures is a result of the anisotropic etching of (100) silicon by means aqueous KOH. The technology aspects of this aggressive wet etching step are discussed as well as the optimisation results of a suitable KOH masking layer: a low refractive index PECVD nitride. The extension of an MCM-D technology with V-grooves generates the possibility to integrate side-emitting O/E components and fibers with the electronics on the same MCM-Si motherboard. This implies a more dense and compact motherboard with the potential of obtaining higher bandwidths due to the minimal distance between optics and electronics. Additionally, low coupling losses between O/E components and fibers are obtained by means of passive alignment as the accuracy of the V-grooves in silicon allow us to place the fibers with high precision. The feasibility of this optics-extended MCM-D technology will be shown in the example of O/E measurement probes. In the fabrication process of such O/E measurement probes, we will focus on the multilayer MCM-D motherboard extended with V-grooves, on the FC mounting of both RF-amplifier chip and laserdiode, and on the alignment of the fiber.

With the proliferation of flip chip packaging and multiple metal layer technology in advanced semiconductor integrated circuits (IC’s), traditional front-side probing and failure analysis tools are no longer viable. Full transistor level access from the substrate side (i.e., backside) of the chip is now required to fully realize such investigative work. Silicon is transmissive in the near-IR above its bandgap (≅ 1,000nm to 1,100nm). As a result, transistor level access can be achieved by optical means. To enable such optical access, it is necessary to first remove all heat dissipating devices such as finned heat sinks and integrated heat spreaders placed in contact with the silicon substrate. For most applications, the silicon is then mechanically thinned down to approximately 100μm, and a microscope objective is used to “probe” the chip optically for diagnostics and failure analysis. During such diagnostics and failure analysis, the device under test (DUT) is electrically exercised typically “at speed”, which translates into high power dissipation levels. A thermal management system that can be physically and optomechanically integrated with state-of-the-art diagnostics and failure analysis systems, and can dissipate significant power levels is required to maintain the DUT’s temperature equilibrium and avoid thermal runaway, that could irreversibly damage the DUT. One possible and efficient solution is provided by spraying a dielectric coolant directly onto the chip. In the present study, a test chip was used in conjunction with an exact model of a novel microscope objective that is in full contact with the device. The test chip was powered in increments from 0 to 82W/cm 2 , and the device level temperature was measured by several temperature sensors embedded in the chip. A spray head was designed to deliver conditioned coolant to the test chip’s surface, while simultaneously accommodating the obstruction of the microscope objective and allowing full optical access to the entire chip surface. Thermal performance results for the cooling system are provided for uniform heat flux levels of 30, 52, and 82W/cm 2 , with the optical probe located in the worst-case center of the test chip. For all heat fluxes studied, the maximum device level temperature did not exceed 60°C, the across-chip temperature differential was approximately 31°C, and surface temperature fluctuations were seen to have a standard deviation of less than ±1°C. The results are discussed in-depth, and are put in perspective of industry needs.