As electronic devices continue to shrink in size and increase in functionality, effective thermal management has become a critical bottleneck that hinders continued advancement. Two-phase cooling technologies are of growing interest for electronics cooling due to their high heat removal capacity and small thermal resistance (< 0.3 K-cm 2 /W) [1]. One typical example of a two-phase cooling method is droplet evaporation, which can provide a high heat transfer coefficient with low superheat. While droplet evaporation has been studied extensively and used in many practical cooling applications (e.g., spray cooling), the relevant work has been confined to spherical droplets with axisymmetric geometries. A rationally designed evaporation platform that yields asymmetric meniscus droplets can potentially achieve larger meniscus curvatures, which give rise to higher vapor concentration gradients along the contact line region and therefore yield higher evaporation rates. In this study, we develop a numerical model to investigate the evaporation behavior of asymmetrical microdroplets suspended on a porous micropillar structure. The equilibrium profiles and mass transport characteristics of droplets with circular, triangular, and square contact shapes are explored using the Volume of Fluid (VOF) method. The evaporative mass transport at the liquid-vapor interface is modeled using a simplified Schrage model [2]. The results show highly non-uniform mass transport characteristics for asymmetrical microdroplets, where a higher local evaporation rate is observed near the locations where the meniscus has high curvature. This phenomenon is attributed to a higher local vapor concentration gradient that drives faster vapor diffusion at more curved regions, similar to a lightning rod exhibiting a strong electric field along a highly curved surface. By using contact line confinement to artificially tune the droplet into a more curved geometry, we find the total evaporation rate from a triangular-based droplet is enhanced by 13% compared to a spherical droplet with the same perimeter and liquid-vapor interfacial area. Such a finding can guide the design and optimization of geometric features to improve evaporation in high performance electronics cooling systems.

Flip chip (FC) packaging techniques in modern power electronics have enabled increased power density in module performance, but mechanical stresses induced by thermal expansion during inherent operating conditions in the power devices and packages create a need for understanding thermomechanical fatigue mechanisms that lead to reliability concerns. Moreover, in actual use, these mechanical stresses impact the reliable lifetime alongside thermal factors (such as diffusion and microstructural transformation) and other process history effects. This amalgam of damage inducing phenomena make development of a concise association between damage, fatigue, and stress factors difficult to determine. For reliability demonstration under fatigue loading, accelerated life testing (ALT), such as Thermal Cycling (TC), are commonly used in industry; however, long duration and expensive equipment required for TC limit its utility, especially when considering the high cost of wide-bandgap devices and modules, and the limitation of high temperature (> 150°C) testing standards. As a result, alternative test methodologies are needed to provide faster, cheaper, and design integrable reliability determination. In this work, an accelerated test methodology is introduced and designed to simulate these mechanical stresses at isothermal conditions, which is demonstrated using test chips that are analogous to power devices. By stressing these devices in a controlled environment, mechanical stresses become de-coupled from the design and temperature, such that useful lifetimes can be predictable. Mechanical shear stress was cyclically applied directly to device-relevant, flip-chip solder interconnects while monitoring cycles-to-failure (CTF). Also, Finite Element Analysis (FEA) is used to extract various damage metrics of different solder materials (including PbSn37/63, SAC305 and Nano-silver) in both thermal operation and the introduced alternative mechanical testing conditions. In doing so, test protocol translations to common qualification tests (or use condition thermal profiles) can be determined and are validated using the mechanical shear stress testing method. Plastic work density and maximum shear were calculated in the critical solder interconnects for different isothermal mechanical testing temperatures (22°C, 75°C, 100°C and 125°C) and the results are compared with the simulation results of different TC test conditions. This reliability determination with failure parameter isolation allows for improved integration with FEA modeling for a priori reliability prediction during the design process.

Silicon photonics has emerged as a scalable technology platform for future optotelectronic communication systems. However, the current use of SiO 2 -based silicon-on-insulator (SOI) substrates presents a thermal challenge to integrated active photonic components such as lasers and semiconductor optical amplifiers due to the poor thermal properties of the buried SiO 2 optical cladding layer beneath these devices. To improve the thermal performance of these devices, it has been suggested that SiO 2 be replaced with aluminum nitride (AlN); a dielectric with suitable optical properties to function as an effective optical cladding that, in its crystalline state, demonstrates a high thermal conductivity (∼100× larger than SiO 2 in current SOI substrates). On the other hand, the tuning efficiencies of thermally-controlled optical resonators and phase adjusters, crucial components for widely tunable lasers and modulators, are directly proportional to the thermal resistance of these devices. Therefore, the low thermal conductivity buried SiO 2 layer in the SOI substrate is beneficial. Moreover, to further improve the thermal performance of these devices air trenches have been used to further thermally isolate these devices, resulting in up to ∼10× increase in tuning efficiency. Here, we model the impact of changing the buried insulator on a SOI substrate from SiO 2 to high quality AlN on the thermal performance of a MRR. We map out the thermal performance of the MRR over a wide range of under-etch levels using a thermo-electrical model that incorporates a pseudo-etching approach. The pseudo-etching model is based on the diffusion equation and distinguishes the regions where substrate material is removed during device fabrication. The simulations reveal the extent to which air trenches defined by a simple etch pattern around the MRR device can increase the thermal resistance of the device. We find a critical under-etch below which no benefit is found in terms of the MRR tuning efficiency. Above this critical under-etch, the tuning efficiency increases exponentially. For the SiO 2 -based MRR, the thermal resistance increases by ∼7.7× between the un-etched state up to the most extreme etch state. In the unetched state, the thermal resistance of the AlN-based MRR is only ∼4% of the SiO 2 -based MRR. At the extreme level of under-etch, the thermal resistance of the AlN-based MRR is still only ∼60% of the un-etched SiO 2 -based MRR. Our results suggest the need for a more complex MRR thermal isolation strategy to significantly improve tuning efficiencies if an AlN-based SOI substrate is used.

Polymer materials have been widely used in electronic packaging with many advantages such as: lower cost, light weight and good performance. They however suffer a major drawback that results in a number of challenges for reliability engineers and researchers, in which polymer materials are quite sensitive to moisture absorption when exposed to humid environment, causing many failure modes in electronic packages such as: popcorn cracking, delamination or corrosion. It is well-known that finite element simulation is a powerful tool to evaluate the effects of moisture on electronic package reliability. In this study, three moisture properties (diffusivity, saturated concentration, and coefficient of moisture expansion) were experimentally characterized. The obtained results were then used to perform moisture diffusion simulations on various types of electronic package. Finally, a numerical study was conducted on the dependence of the moisture effects (weight gains, die stresses) upon each moisture property of polymeric components of three kinds of electronic packages (Quad Flat Package, Plastic Ball Grid Array, and Flip Chip on Laminate). The results of the study provided valuable insights into how moisture induced die stresses vary with each moisture property of polymeric components in the packages.

Transition of ground vehicles to HEV and FEV has necessitated the operation of electronics in automotive underhood at high voltage bias and high temperature for extended period-of-time. Examples include gate drivers and IGBT modules. A typical automotive benchmark is operation for 10 years and 100,000 miles. Simultaneously, the first-level interconnects are migrating to use copper-wire interconnects in place of the previously used gold wire. Copper wire has higher propensity for corrosion and a narrower process-bonding window in comparison with gold wire based systems. Exposure to high temperature, humidity and bias influences the mobility of ions in the EMC and thus the contaminant transport to the WB interfaces. Measurements of diffusion behavior of EMCs at high temperature and high voltage bias are not available for readily being used in models. Prior studies have focused on biased humidity tests on wire bonds with the amplitude of the bias being limited up to 3.5Volts. In this paper, a PWM-controlled-gate drive-based test setup is established to study the effect of high voltage (up to 20Volts) on Cu-Al wire bond interconnects. A migration-diffusion cell experiment is designed to quantify the effect of voltage bias on transport of chlorine in EMCs. Diffusion coefficient and ionic mobility of chlorine at different temperatures are obtained. Resistance spectroscopy measurements show the progression of corrosion induced by voltage bias. A corrosion simulation is used to quantify the effect of voltage bias on corrosion rate of Cu-Al wire bond.

Advective molding in vapor-permeable templates is an evaporation-driven process for submicron molding of nanoparticles with high fidelity. In this process, nanoparticle ink is drawn through channels in a vapor permeable template. The ink solvent is sorbed into the channel walls and evaporated through the template. As the complexity (e.g., width variation and turns in a channel) of the desired features increases, so does the likelihood of incompletely patterned nanoparticles. Patterning difficulties arise from dry-out, a condition where the nanoparticle ink dries before reaching the end of the channel and blocks the flow of more ink. Predicting dry-out during the template development stage is a critical step in patterning complex features. In this work, we present a method for predicting dry-out by incorporating two layers of finite element analysis. First, models for ink fluid flow and solvent diffusion through the template are used to determine wall sorption rate correlations. Fluid flow through complex templates is then modeled in a fluid-only model, with the flux rate into the template walls determined by the sorption rate correlations. The fluid velocities and wall sorption rates are then used to determine the likelihood of dry-out. The linked simulations successfully predict points of improper nanoparticle patterning in real templates.

In this work, an investigation has been performed on hygrothermally induced die stresses in flip chip assemblies caused by moisture absorption by the underfill encapsulant. Silicon test chips were first applied to perform a variety of measurements of moisture and thermally induced die stresses in flip chip on laminate assemblies. The sample die stresses were first measured after underfill encapsulation and cure, and then subsequently after long term storage (10 years) at room temperature and ambient humidity. The assemblies were then exposed to and 85 °C and 85% RH high humidity harsh environment for various durations, and the die stresses were evaluated as a function of the exposure time. Finally, reversibility tests were conducted to see whether the effects of moisture uptake were permanent. After long term storage, the experimental measurements showed that the normal stresses in the flip chip die relaxed significantly, while the shear stresses exhibited only small variations. In addition, the 85/85 hygrothermal exposure had strong effects, generating tensile die normal stress changes of up to 30 MPa in the flip chip assemblies. Thus, the initial compressive die normal stresses due to flip chip assembly were found to relax significantly during the moisture exposure. Upon fully redrying, it was observed that the moisture-induced stress changes were fully recovered. The results of the experimental measurements were subsequently correlated with predictions from finite element numerical simulations. When performing moisture diffusion modeling, the conventional method is to use a thermal analogy based on the similarity of governing equations of heat transfer and moisture diffusion. However, this method has some drawbacks including giving incorrect results when dealing with time- and temperature-dependent problems or discontinuities in the moisture concentrations at material boundaries. In this study, we have used a new feature in ANSYS v14 to perform coupled multi-physics simulations of the moisture diffusion process without the aforementioned limitations. The simulation results were found to show strong correlations with experimental measurements.

In conjunction with micro bumps, Through-Silicon-Vias (TSVs) are used for die stacking, leading to reduced footprints and a higher performance due to shorter communication bus-length. However the large difference between the thermal expansion of silicon and copper and an increased temperature of the die stack due to Joule heating lead to shear stress at the interface between TSV and substrate. Temperature activated interfacial diffusion in combination with the shear stress leads to diffusional interfacial sliding, resulting in TSV pro- or intrusion. In addition, electromigration (EM) at the interface leads to TSV motion. Against this background the protrusion/intrusion of Cu TSVs (ø 10 μm, length 100 μm) during fast and slow rate thermal cycling (TC) and during EM experiments was investigated. Parallel to the experimental investigation a finite element analysis (FEA) was performed to study the micro-mechanical responses of Cu-filled TSV during thermal cycling. For this purpose interfacial sliding was incorporated into the FE model by diffusional creep mechanism. The FE model captures the main features being observed in experiments such as stress hysteresis and intrusion/protrusion of the TSV relative to Si substrate.

Solid liquid inter diffusion (SLID) is an interconnection technique for electronic packaging, particularly beneficial for high power and harsh environments conditions. It consists of the bonding of two materials with different melting points at a low processing temperature to achieve a high melting point interconnection. The materials investigated in this work are a gold-tin bond attaching a SiC diode to an AlN direct-bond-copper (DBC) substrate. Gold (Au) is the high melting point constituent while the eutectic gold-tin (80 wt.% Au-20 wt.%Sn) offers the low melting point (280°C). This work is aimed at the microstructural evaluation of the joints at different bonding and aging conditions in an effort to get the insights of this interconnection technology from a metallurgical perspective. Four different bonding conditions were used: 315°C-5min, 315°C-10min, 340°C-1min and 340°C-5min; from which a base-line as built condition was assessed by means of metallographical analysis. Furthermore, the samples were aged at 250°C from 1000 to 4000 hours in increments of 1000hrs to study and quantify the microstructural stability and intermetallic (IMC) growth at the interface. This aging experiment has been designed to obtain accelerated information on the kinetics of this reaction so that predictive models can be developed for the real application conditions. The samples were diced, polished and analyzed following standard metallographical techniques; both optical and electronic microscopy (SEM-EDS) was employed. The as-built samples, for the four bonding conditions, presented differences in IMC growth with the thickest layers appearing at the harshest processing conditions. After aging the IMC kept growing and the formation of a new IMC layer was discovered and investigated, furthermore, cracks started to show in some of the samples. It was observed that after 4000 hours some of the cracks extended across the whole interface.

The increasing price of gold has resulted in industry interest in use of copper as alternative wire bonds interconnect material. Copper wire has the advantages of the lower cost, lower thermal resistivity, lower electrical resistivity, higher mechanical strength and higher deformation stability over the gold wire. In spite of the upside above, the Cu-Al wire bond is susceptible to the electrolytic corrosion and the reliability of Cu-Al wire bond is of great concern. Typical electronic molding compounds are hydrophilic and absorb moisture when exposed to humid environmental conditions. EMC contain ionic contaminants including chloride ions as a result of the chemical synthesis of the subcomponents of the resin, etching of metallization and the decomposition of the die-attach glue. The presence of moisture in the operating environment of semiconductor package makes the ion more mobile in the EMC. The migration of chloride ions to the Cu-Al interface may induce electrolytic corrosion inside the package causing degradation of the bond interface resulting in eventual failure. The rate at which the corrosion happens in the microelectronic packages is dependent upon the rate at which the ions transport through the EMC in addition to the reaction rate at the interface. In this effort, a multiphysics model for electrolytic corrosion in the presence of chloride has been presented. The contaminant diffusion along with the corrosion kinetics has been modeled. In addition, contaminated samples with known concentration of KCl contaminant have been subjected to the temperature humidity conditions (130°C/100RH)The resistance of the Cu-Al interconnects in the PARR test have been monitored periodically using resistance spectroscopy. The diffusion coefficients of chloride ion at various temperatures in the molding compound have been measured using inductively coupled plasma. Measured diffusion coefficients have been incorporated into the COMSOL multiphysics model. Moisture ingress into the EMC has been quantified through measurements of the weight gain in the EMC. Predictions from the COMSOL multiphysics model have been correlated with experimental data.

During ultrasonic ball bonding of copper wire to aluminum pad, the two alloys are joined over an immensely short period of time (<100ms), at a relatively low temperature (< 200°C). Bond formation in such condition is related to accelerated diffusional processes and formation of intermetallic compounds (IMC). Despite the industrial importance of the phenomenon, the micro-mechanism of IMC formation is not clearly understood, nor deeply studied. One of the main barriers toward understanding the phenomena is the limited capability of experimental analysis for analyzing processes occurring over short period of time. In this research, a combination of theoretical analysis and finite element simulation is used to investigate the mechanisms that lead to diffusion enhancement and, as a result, IMCs formation.

Diffusion is an important mechanism for failure inducing phenomena in many applications. The common Pb-free solder alloys used in the current generation of electronics packages are complex multiphase multicomponent materials. As the scale of the solder joint decreases, it becomes increasingly important to account for the effect of surface phenomena such as grain boundary evolution, surface diffusion and interfacial reactions in the mechanics of the solder joints. The dynamics of these diffusion driven interfacial phenomena are affected by the state of stress and the electric current in the solid. The primary challenges to modeling the dynamics of evolution are the tracking of the interface while satisfying the boundary conditions for the bulk problem. In previous work, the authors utilized the phase field method in conjunction with a commercial finite element code to study the effect of stress and electrical fields on the diffusion driven evolution of voids in solder interconnects. The utilization of commercial tools for the simulation of the stress, electrical and thermal fields allowed for the use of pre-existing meshes and allowed the study of electromigration failure in assemblies of solder joints. However, the use of commercial tools can be expensive and the options for parallel simulation are limited, restricting the size and complexity of the simulations. In this work, the authors describe DiffCode, a parallel adaptive finite element code for three-Dimensional simulation of electromigration and stress migration driven failure due to void evolution and growth in solder as well as line interconnects using the phase field method. Several illustrative two-dimensional and three-dimensional electromigration driven void evolution simulations are demonstrated using the code.

Due to world wide Pb-free regulation for electroplated tin, whisker formation has returned as a long term reliability problem for tin coated electronic components. In addition the exact mechanism(s) responsible for Sn whisker growth mitigation by Pb were never clearly indentified, which makes the search for an replacement of Pb a difficult process. In this work the effects of In doping on tin whisker growth were investigated. In order to maintain Sn as a single phase material only small additions of In were incorporated, approximately 5–10 wt.% In. Indium was incorporated into Sn using a 100 nm over-plate of In on 1 μm thick Sn followed by heat treatments at 125°C and 160°C to permit diffusion of In into Sn. Control samples of pure Sn in the as-plated as well as 125 C heat treated conditions were also used. Whisker density results show a dramatic decrease of almost two orders of magnitude for the 160°C HT Sn-In sample. This is a new result in whisker mitigation studies, and we interpret it as a real effect of In, although further verification including the use of control samples are required. The segregation of dopants at the grain boundaries (GB) of tin, which might lead to reduced self diffusion of Sn, was investigated by performing molecular dynamic (MD) simulations on randomly added Pb atoms. Segregation of Pb clusters to GB was observed. While simulations with In dopant has not been conducted as yet, nevertheless such segregation may be one of several mechanisms responsible for the In effect.

Electroplated copper thin films are indispensable for the interconnections in the advanced electronic products, such as TSV (trough silicon via) structures, fine bumps, and thin-film interconnections in various devices and interposers. However, it has been reported that both electrical and mechanical properties of the films vary drastically comparing with those of conventional bulk copper. The main reason for the variation can be attributed to the fluctuation of the crystallinity of grains and grain boundaries in the films. Porous or sparse grain boundaries cause the increase in electrical resistivity and the embrittlement of the films. Thus, the thermal conductivity of the electroplated copper thin films should be varied drastically depending on their micro texture based on Wiedemann-Franz law. Since copper interconnections are used for not only electrical conductor but also thermal heat conductor, it is important to clarify the relationship between the crystallinity and thermal properties of the films. In this study, the local distributions of the crystallinity and physical properties were investigated experimentally. As the result of the temperature distribution due to local Joule heating along an interconnection, it was suggested that the variation in the quality of the grain boundaries in the electroplated copper thin-films caused the non-uniformity of the resistivity and thus, Joule heating in the thin films. In this study, the effect of the seed layer material on the thermal properties of the electroplated copper thin film was investigated. When a Ru seed layer was deposited as a buffer layer between the electroplated copper thin film and the Ta diffusion barrier layer, both the crystallinity and uniformity of grain boundaries in the electroplated copper films were improved since lattice mismatch between copper and the seed layer metal was decreased. The improvement of the crystallinity increased the long-term reliability of the interconnections under the loads of electromigration and stress-induced migration.

Electroplated copper thin films have started to be employed as the interconnection material in TSV structures of 3D semiconductor modules because of its low electric resistivity and high thermal conductivity. However, electrical and mechanical properties of electroplated copper thin-films have been found to vary drastically depending on their microtexture. In particular, the crystallographic quality (crystallinity) of grain boundaries in the electroplated copper thin-films plays an important role on the variations of these properties and the long-term reliability of the interconnections. This is because grain boundaries are the area where the atomic alignment of mateerials is disordered and thus, various defects such as vacancies, dislocations, impurities, and strain easily concentrate around them. This disorder of the atomic alignment causes the increase in the electrical resistivity, diffusion constant along the grain boundaries, and the brittleness of the material. Therefore, it is very important to evaluate the characteristics of a grain boundary quantitatively in order to control and assure the properties of the electroplated copper thin films. In this study, a novel tensile test method that can measure the strength of a grain boundary has been developed by using a focused ion beam system. In order to investigate the effect of the crystallinity of grain boundaries on their strength, an electron back-scatter diffraction method (EBSD) was employed for the quantitative characterization of grain boundaries. It was confirmed that the strength of grain boundaries with low crystallinity was much lower than that with high crystallinity.

Erosion behavior of plasma nitrided stainless steel by molten Sn was examined. To investigate the erosion behavior, the interfacial reaction was investigated at the temperature ranging from 350 to 450°C using plasma nitrided SUS304 and SUS316 stainless steel which sandwich pure Sn foil. As the results, it was found that the surface area of the nitrided layer is peeled and subsequently FeSn 2 phases form in the reaction interface. FeSn 2 phases grow toward molten Sn and Sn diffuses into the nitrided layer. Moreover, Ni 3 Sn 4 phases form and grow in molten Sn. Apparent activation energies of the Sn diffusion into the nitrided layer were estimated to be 153 kJ/mol and 133 kJ/mol for plasma nitrided SUS304 and SUS316, respectively.

This paper discusses a numerical model for analysing the effects of mechanical stress on semiconductor devices. In other words, drift-diffusion device simulation is conducted using a physical model incorporating the effects of mechanical stress. Then, each impact of the stress-induced physical phenomena is analysed. In our previous study, three physical phenomena that were attributed to mechanical stress have been modeled in our electron mobility model, i.e., the changes in relative population, the momentum relaxation time and the effective mass of electrons in conduction-band valleys. In addition, in this study, the stress-induced change of intrinsic carrier density is modeled. Stress-induce variations of drain current characteristics on n-type Metal Oxide Semiconductor Field Effect Transistors (nMOSFETs) are evaluated using a drift-diffusion device simulator including above mentioned physical models. It is demonstrated that the impact of stress-induced change of intrinsic carrier density is small for our evaluated nMOSFETs.

Synthetic jets are produced by periodically injecting and ejecting fluid from an orifice. The mass flow rate is conserved in such a jet but net momentum flux is created due to the difference in the fluid dynamics at the orifice between the ejection and suction parts of each cycle. When pointed towards a heated surface, the synthetic jet can be used for cooling using the well-known advantages of jet impingement. In the present work, we have created a “canonical” jet in order to investigate the flow and heat transfer of a purely periodic synthetic jet which is not influenced by the manner in which it is generated. As such the “canonical” jet and the resulting heat transfer, can be considered to be dependent solely on the driving suction/ejection mechanisms at the orifice and thus can be examined independently of the actuator. The unsteady Navier-Stokes equations and the convection-diffusion equation were solved using a fully unsteady, laminar, three-dimensional axisymmetric finite volume approach in order to capture the complex time-dependent flow field created by different frequencies. The influence of jet-to-surface distance, Reynolds number, and driving frequency on heat transfer were investigated. Both stagnation and averaged Nusselt numbers were observed to be less dependent on frequency. Heat transfer was found to be higher at high Re numbers and low jet-to-surface distance. Results were compared with the steady continuous jet, experimental data of previous studies and the canonical slot synthetic jet at the same Reynolds number. A circular jet was found to be less efficient in removing heat over the heated wall than a slot synthetic jet.

The erosion behavior of plasma nitriding SUS304 stainless steel by molten lead-free solder was examined. Plasma nitriding treatment was conducted to the surface of SUS304 steel. The thickness of the nitriding layer was approximately 17 μm. The layer mainly consists of Fe 4 N, CrN and Cr 2 N. Erosion of nitriding SUS304 stainless steel was observed after erosion test with molten Sn-3Ag-0.5Cu (mass%) solder at 450°C for 100 h. On the basis of the result of microstructure observation, it was found that Sn diffusion into the nitrided layer occurred in non eroded area. The result shows that Sn diffusion into the nitrided layer induces erosion of plasma nitriding stainless steel.

Synthetic jets are generated by an equivalent inflow and outflow of fluid into a system. Even though such a jet creates no net mass flux, net positive momentum can be produced because the outflow momentum during the first half of the cycle is contained primarily in a vigorous vortex pair created at the orifice edges whereas in the backstroke, the backflow momentum is weaker, despite the fact that mass is conserved. As a consequence of this, the approach can be potentially utilized for the impingement of a cooling fluid over a heated surface. In the present study, a canonical geometry is presented, in order to study the flow and heat transfer of a purely oscillatory jet that is not influenced by the manner in which it is produced. The unsteady Navier-Stokes equations and the convection-diffusion equation were solved using a fully unsteady, two-dimensional finite volume approach in order to capture the complex time dependent flow field. A detailed analysis was performed on the correlation between the complex velocity field and the observed wall heat transfer. A fundamental frequency, in addition to the jet forcing frequency, was found, and was attributed to the coalescence of consecutive vortex pairs. In some instances, this vortex pairing can lead to zones of low heat transfer. Two point correlations showed that the Nusselt number Nu , showed stronger correlation with the vertical velocity v although the spatial-temporal dependencies are not yet fully understood. It was found that the Reynolds number and the Strouhal number, are sufficient to successfully scale the problem at larger dimensions and this is presently being exploited in order to design validation experiments using jets large enough to allow careful local measurements.