Abstract

In this study, a detailed characterization of Au-Sn eutectic ultra-thin metal stack (∼ 1 μm) bonding has been performed between Pyrex and silicon substrates using a commercial flip-chip bonder. A thorough recipe characterization and development was performed on three different bond sizes of 9, 49 and 100 mm2 by varying bonding temperature between 320 and 380°C with pressure ranging between 2 to 10 MPa. Results indicate that better bond quality was observed at higher temperatures but was relatively unaffected by the bond pressure magnitude. It was also found that flatness of contact is one of the most important parameters that determine the bond uniformity and thus the quality, which is especially important for ultra-thin metal bonding. In addition, this study puts special emphasis on observing the bond uniformity and metal overflow through the transparent Pyrex top substrate. The mean overflow width increased with increasing temperature, reaching as high as 300 μm at 380°C, but was not significantly affected by the bond pressure applied. Simultaneously, the ultra-thin bond layer made it possible for us to observe several different types of microstructures forming within the bond zone, which provided crucial information about sample cool down rate, grain size and intermetallic composition in the eutectic alloy. For a specific case, Kirkendall voids were observed under the optical microscope at the interface between Pyrex and bonded metal because of dissimilar rates of migration of Au and Sn during the eutectic reaction. We believe that this is the first successful observation of voids in bond alloy using non-destructive optical imaging techniques. Following successful characterization of metal reflow from the bond site, a simple method to control this overflow has been demonstrated by precisely controlled misalignment of the two complementary chips. This fundamental study on eutectic bonding aims to further the understanding of eutectic bonding process as well as facilitate development of effective ultra-thin layer, high strength bonding recipes between chips for versatile applications in the electronic packaging industry.

This content is only available via PDF.
You do not currently have access to this content.