A low order fast running parametric analysis tool, ParaPower, was used to arrive at the design for a novel high voltage module. The low order model used a 3D nodal network to calculate device temperatures and thermal stresses. The model assumed heat flux generated near the top surface of each device which is then conducted through the packaging structure and removed by convection. The temperature distribution is used to calculate thermal stresses throughout the package. This co-design modeling tool, developed for rectilinear geometries, allowed a rapid evaluation of the package temperatures and CTE induced stresses throughout the design space. However, once the final design configuration was determined a detailed finite element analysis was performed to validate the design. This paper compares the results obtained using ParaPower to the FEA, demonstrating the usefulness of the parametric analysis tool. Results for both temperature and CTE induced stress are compared. Two different stress models are evaluated. One based on the more traditional planar module design, which assumes a substantial substrate or heat spreader on which the module is assembled. The other model is less restrictive, eliminating the requirement for a substrate. The FEA modeling was performed using SolidWorks beginning with a thermal analysis followed by a stress analysis based on the temperature solution. Both the values and the trends of the temperatures and stresses were evaluated. The temperature results agreed to within 3.2°C. The trends and sign of the stresses were correctly predicted, but the magnitudes were not. One of the significant advantages of ParaPower is the speed of the computation. The run time for the parametric analysis was roughly two orders of magnitude faster than the FEA. This made it possible to build the model and complete the parametric analysis of roughly 500 runs in less than a day.
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ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems
August 27–30, 2018
San Francisco, California, USA
Conference Sponsors:
- Electronic and Photonic Packaging Division
ISBN:
978-0-7918-5192-0
PROCEEDINGS PAPER
Comparison of Thermal and Stress Analysis Results for a High Voltage Module Using FEA and a Quick Parametric Analysis Tool
L. M. Boteler,
L. M. Boteler
U. S. Army Research Laboratory, Adelphi, MD
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S. M. Miner
S. M. Miner
U. S. Naval Academy, Annapolis, MD
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L. M. Boteler
U. S. Army Research Laboratory, Adelphi, MD
S. M. Miner
U. S. Naval Academy, Annapolis, MD
Paper No:
IPACK2018-8394, V001T04A019; 10 pages
Published Online:
November 13, 2018
Citation
Boteler, LM, & Miner, SM. "Comparison of Thermal and Stress Analysis Results for a High Voltage Module Using FEA and a Quick Parametric Analysis Tool." Proceedings of the ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems. ASME 2018 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems. San Francisco, California, USA. August 27–30, 2018. V001T04A019. ASME. https://doi.org/10.1115/IPACK2018-8394
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