Two-phase cooling has become an increasingly attractive option for thermal management of high-heat flux electronics. Cooling channels embedded directly on the back of the heat source (chip) facilitate two-phase boiling/evaporation effectiveness, eliminating many thermal resistances generated by more traditional, remote chip-cooling approaches. Accordingly, manifold-microchannel flow paths in embedded cooling systems can allow very high heat fluxes with low junction temperatures. But, the effect of the feeding manifold design, channel geometry, and the associated shear, stagnation zones, and centripetal accelerations with varying heat flux and mass flux are not well understood. This study builds upon our previous work and elucidates effects of channel geometry, mass flux, and outlet quality on the boiling/evaporation flow regimes in a manifolded microgap channel.
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ASME 2017 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems collocated with the ASME 2017 Conference on Information Storage and Processing Systems
August 29–September 1, 2017
San Francisco, California, USA
Conference Sponsors:
- Electronic and Photonic Packaging Division
ISBN:
978-0-7918-5809-7
PROCEEDINGS PAPER
Geometry Effects on Two-Phase Flow Regimes in a Diabatic Manifolded Microgap Channel
David C. Deisenroth,
David C. Deisenroth
University of Maryland, College Park, MD
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Avram Bar-Cohen,
Avram Bar-Cohen
University of Maryland, College Park, MD
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Michael Ohadi
Michael Ohadi
University of Maryland, College Park, MD
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David C. Deisenroth
University of Maryland, College Park, MD
Avram Bar-Cohen
University of Maryland, College Park, MD
Michael Ohadi
University of Maryland, College Park, MD
Paper No:
IPACK2017-74287, V001T02A025; 10 pages
Published Online:
October 27, 2017
Citation
Deisenroth, DC, Bar-Cohen, A, & Ohadi, M. "Geometry Effects on Two-Phase Flow Regimes in a Diabatic Manifolded Microgap Channel." Proceedings of the ASME 2017 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems collocated with the ASME 2017 Conference on Information Storage and Processing Systems. ASME 2017 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems. San Francisco, California, USA. August 29–September 1, 2017. V001T02A025. ASME. https://doi.org/10.1115/IPACK2017-74287
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