We demonstrate the Lid-Integral Silicon Coldplate topology as a way to bring liquid cooling closer to the heat source IC. It allows to eliminate one thermal interface material (TIM2), to establish and improve TIM1 during packaging, to use wafer-level processes, and to ease integration in 1st level packaging. We describe the integration, and analyze reliability aspects of this package using modeling and test vehicle builts. To compare the impact of geometry, materials and mechanical coupling on warpage, strains and stresses, we simulate finite element models of five different topologies on an organic LGA carrier. We measure the thermal performance in terms of thermal resistance from coldplate base to inlet liquid and obtain 15mm2K/W at 30 kPa pressure drop across the package. We build two different topologies using silicon coldplates and injection molded lids. Gasket-attached coldplates pass an 800 kPa pressure test, direct-attached coldplates fracture in the coldplate. The results advise to use a compliant layer between coldplate and the manifold lid and promise a uniformly thick TIM1 layer in the Si-Si matched topology. The work shows the feasibility of composite lids with integrated silicon coldplates in high heat flux applications.
- Electronic and Photonic Packaging Division
Lid-Integral Cold Plate Topology Integration, Performance, and Reliability
Schlottig, G, de Fazio, M, Escher, W, Granatieri, P, Khanna, VD, & Brunschwiler, T. "Lid-Integral Cold Plate Topology Integration, Performance, and Reliability." Proceedings of the ASME 2015 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems collocated with the ASME 2015 13th International Conference on Nanochannels, Microchannels, and Minichannels. Volume 3: Advanced Fabrication and Manufacturing; Emerging Technology Frontiers; Energy, Health and Water- Applications of Nano-, Micro- and Mini-Scale Devices; MEMS and NEMS; Technology Update Talks; Thermal Management Using Micro Channels, Jets, Sprays. San Francisco, California, USA. July 6–9, 2015. V003T10A004. ASME. https://doi.org/10.1115/IPACK2015-48427
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