Analysis of Interfacial Shear Stress and Risk of Debonding in TSVs

Through-Silicon Vias are a key enabler of 3D technology and reliability of these structures is a source of concern. TSVs are typically made of copper and therefore have a large CTE mismatch with the surrounding Si. When subjected to a thermal load during BEOL processing, they experience stress and deform. An important reliability concern that the stress poses is the debonding of the TSV-Si interface, and has been observed experimentally. A possible reason for the debonding is the high interfacial shear stress which could potentially be singular. The authors have obtained analytical estimates of the far-field stress and protrusion in a prior work. In this work the stress singularity at the tip of the TSV-Si interface is obtained. The order of the singularity is correlated to the risk of interfacial delamination.