2.5-D package with through silicon vias (TSVs) on interposer has been envisioned as the most viable way in heterogeneous integration. In this work, several design approaches are considered in the thermal analysis and enhancements of a 2.5-D package with multi chips on through silicon interposer (TSI), which include overmolding materials, metal slug, lid attachment, pin fin heat sink and fan-driven heat sink cooling. The analysis models consist of two dummy flip chips on a silicon interposer to represent the logic die and memory die, respectively. Package submodels, especially the TSV ones, are analyzed with good modeling accuracy. Package thermal modeling indicates that the thermal conductivity of the epoxy overmolding has minimal effect on the thermal performance of copper slug package. Lid attachment further enhances the thermal performance through peripheral substrate attachment. Both designs largely rely on thermally conductive PCB (4L) to maximize power dissipation. Pin-fin heat sink, made of aluminum, can be mounted on the package top to further minimize thermal resistance and extend the power dissipation beyond 10W. For high power application, fan cooled heat sink is used to reduce excessive heat. Copper based aluminum heat sink can remove the heat of 120W from the bare-die package. Self heating due to high current density through the TSV is analyzed. The proposed analytical expression gives good prediction on the local TSV hot spot. It is demonstrated that a distributed TSV network design provides lower temperature rise, which shall have lower risk of failures and is preferred in practice.
- Electronic and Photonic Packaging Division
Thermal Design Analysis of 2.5-D Packages With Analytical TSV Submodels
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Zhang, HY, Yan, X, Zhu, WH, & Lin, L. "Thermal Design Analysis of 2.5-D Packages With Analytical TSV Submodels." Proceedings of the ASME 2015 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems collocated with the ASME 2015 13th International Conference on Nanochannels, Microchannels, and Minichannels. Volume 2: Advanced Electronics and Photonics, Packaging Materials and Processing; Advanced Electronics and Photonics: Packaging, Interconnect and Reliability; Fundamentals of Thermal and Fluid Transport in Nano, Micro, and Mini Scales. San Francisco, California, USA. July 6–9, 2015. V002T02A001. ASME. https://doi.org/10.1115/IPACK2015-48088
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