A high-power LED can generate tremendous heat under the operation, which causes the LED chip undergo large deformation. LED Wire Bonds may undergo deformation because of the mismatch between the LED chip and substrate. Presently, measurements of deformation and strain in operational electronics are limited to measurement on a cut-plane using techniques including digital image correlation and moiré interferometry based techniques. There is need for tools and techniques that can help quantify the in-situ chip deformation and interconnects inside the LED. Digital Volume Correlation (DVC) has been used in conjunction with X-ray Micro-CT for three-dimensional measurement of deformation and strain in LEDs under operational stresses. The Digital Volume Correlation has been used to correlate the undeformed image with deformed images by computing correlation functions throughout each voxel. The deformed images have been generated by CT scanning over the object while the LED is operational. The correlation function computation starts at specific fixed subset window in the reference image, and searches every possible subset window in the deformed image to identify the deformation in the electronic structure. Once the displacement components have been derived, the strain components have been computed by calculating the gradients of the displacement field. In this paper, the full strain field, both in-plane and out-plane strain, will be presented, and the LED chip deformation shape will be analyzed.
- Electronic and Photonic Packaging Division
LED Chip Deformation Measurement During the Operation Using the X-Ray CT Digital Volume Correlation
Lall, P, & Wei, J. "LED Chip Deformation Measurement During the Operation Using the X-Ray CT Digital Volume Correlation." Proceedings of the ASME 2015 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems collocated with the ASME 2015 13th International Conference on Nanochannels, Microchannels, and Minichannels. Volume 2: Advanced Electronics and Photonics, Packaging Materials and Processing; Advanced Electronics and Photonics: Packaging, Interconnect and Reliability; Fundamentals of Thermal and Fluid Transport in Nano, Micro, and Mini Scales. San Francisco, California, USA. July 6–9, 2015. V002T01A011. ASME. https://doi.org/10.1115/IPACK2015-48785
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