Continued CMOS scaling accompanied with a stall in the voltage scaling has led to high on-chip power densities. High on-chip power densities elevate the temperatures, substantially limiting the performance and reliability of computing systems. The use of Phase Change Materials (PCMs)1 has been explored as a passive cooling method to manage excessive chip temperatures. The thermal properties of PCMs allow a large amount of heat to be stored at near-constant temperature during the phase transition. This heat storage capability of PCM can be leveraged during periods of intense computation. For systems with PCM, development of new management strategies is essential to maximize the benefits of PCM. In order to design and evaluate these management strategies, it is necessary to have an accurate PCM thermal model. In our recent work, we proposed a detailed phase change thermal model, which we integrated into a compact thermal simulation tool, HotSpot. In this paper, we build a hardware testbed incorporating a PCM unit on top of the chip package. We then validate the accuracy of our previously proposed thermal model by comparing the HotSpot simulation results against the measurements on the testbed. We observe that the error between the measured and simulated temperatures is less than 4°C with 0.65 probability. Finally, we implement a soft PCM capacity sensor that monitors the remaining PCM latent heat capacity to be used for development of thermal management policies. We evaluate a set of thermal management policies on the testbed. We compare policies that adjust the sprinting frequency based on current temperature against the policies that take action based on the remaining PCM capacity.
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ASME 2015 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems collocated with the ASME 2015 13th International Conference on Nanochannels, Microchannels, and Minichannels
July 6–9, 2015
San Francisco, California, USA
Conference Sponsors:
- Electronic and Photonic Packaging Division
ISBN:
978-0-7918-5688-8
PROCEEDINGS PAPER
Experimental Validation of a Detailed Phase Change Model on a Hardware Testbed
Charlie De Vivero,
Charlie De Vivero
Boston University, Boston, MA
Search for other works by this author on:
Ayse K. Coskun
Ayse K. Coskun
Boston University, Boston, MA
Search for other works by this author on:
Charlie De Vivero
Boston University, Boston, MA
Fulya Kaplan
Boston University, Boston, MA
Ayse K. Coskun
Boston University, Boston, MA
Paper No:
IPACK2015-48568, V001T09A086; 10 pages
Published Online:
November 19, 2015
Citation
De Vivero, C, Kaplan, F, & Coskun, AK. "Experimental Validation of a Detailed Phase Change Model on a Hardware Testbed." Proceedings of the ASME 2015 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems collocated with the ASME 2015 13th International Conference on Nanochannels, Microchannels, and Minichannels. Volume 1: Thermal Management. San Francisco, California, USA. July 6–9, 2015. V001T09A086. ASME. https://doi.org/10.1115/IPACK2015-48568
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