Numerical methods such as the finite element method (FEM) have been used to evaluate the reliability of electronic packages. The accuracy of the analyses should be verified by some experimental measurements. In this study, we evaluated the thermal strain of a test chip for three-dimensional stacked integrated circuits (3D SIC) with both measurement and an analysis. First, the distribution of thermal strain on the cross-section of a test chip was measured using scanning electron microscope (SEM) and the digital image correlation. Then, the distribution of strain of the test chip was also analyzed by the FEM considering the viscoelastic material properties of underfill (UF) resin measured with the stress relaxation test and the elastic-plastic material properties of components measured with the nano-indentation tests. The accuracy of the nonlinear finite element analysis was verified using the strain measurements with the SEM-DICM.
A test specimen for the 3D SIC packages was built and cut out a part of the test specimen and polished its cross-section. We took digital images using a SEM (FEI Quanta 200) to measure the strain distributions on the cross-section of a specimen by the DICM. The specimen was subjected to thermal loading in a heat chamber. The temperature in the chamber was raised from 30° C to 130°C.
The FE analyses were carried out using MSC.Marc™. We assumed the initial temperature of the analysis to be 150°C, which was the curing temperature of the UF resin, and decreased the temperature to 30°C during 100 seconds. Then, the temperature was raised up to 130°C, which is the same with the experiment. We compared the numerical result with the measurement and modified the model of the FE analyses.