There is high demand for fatigue life prediction of solder joints in electronic packages such as ball grid arrays (BGAs). A key component of fatigue life prediction technology is a canary device, which warns of the impending risk of failure through loss of function before other important parts become severely impaired. In a BGA package, thermal fatigue of solder joints normally starts from the solder joints at the outermost part of the package. This can be taken advantage of by using the outermost solder joints as canary devices for detecting the degree of cumulative mechanical fatigue damage. To accurately estimate the lifetimes of other functional solder joints, it is essential to understand the relationship between the fatigue lives of canary joints and other functional joints. Damage path simulation is therefore proposed for predicting the crack propagation in solder joints on electronic packages through numerical simulation. During the process of designing the layout of canary joints and other joints, it is very useful to know not only the relationship between the fatigue lives of the canary and other joints, but also the path of crack propagation through all joints. This paper presents a method for estimating the relationship between the fatigue lives of canary joints and other joints by using damage path simulation. Some BGA packages mounted on a printed circuit board are modeled to demonstrate the process of estimating the lifetime of each joint under thermal cycle loading. A large-scale finite element model is used to accurately represent the geometrical properties of the printed circuit board and package. Both crack initiation and crack propagation processes can be simultaneously evaluated by modeling all of the solder joints on each package. The results show that damage path simulation and large-scale modeling are useful for determining the layout of canary joints in electronic packages.
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ASME 2013 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems
July 16–18, 2013
Burlingame, California, USA
Conference Sponsors:
- Electronic and Photonic Packaging Division
ISBN:
978-0-7918-5575-1
PROCEEDINGS PAPER
Large-Scale Damage Path Simulation for Solder Joints in a BGA Package
Takahiro Omori,
Takahiro Omori
Toshiba Corporation, Kawasaki, Japan
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Kenji Hirohata,
Kenji Hirohata
Toshiba Corporation, Kawasaki, Japan
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Tomoko Monda,
Tomoko Monda
Toshiba Corporation, Kawasaki, Japan
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Minoru Mukai
Minoru Mukai
Toshiba Corporation, Tokyo, Japan
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Takahiro Omori
Toshiba Corporation, Kawasaki, Japan
Kenji Hirohata
Toshiba Corporation, Kawasaki, Japan
Tomoko Monda
Toshiba Corporation, Kawasaki, Japan
Minoru Mukai
Toshiba Corporation, Tokyo, Japan
Paper No:
IPACK2013-73161, V001T04A010; 6 pages
Published Online:
January 20, 2014
Citation
Omori, T, Hirohata, K, Monda, T, & Mukai, M. "Large-Scale Damage Path Simulation for Solder Joints in a BGA Package." Proceedings of the ASME 2013 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems. Volume 1: Advanced Packaging; Emerging Technologies; Modeling and Simulation; Multi-Physics Based Reliability; MEMS and NEMS; Materials and Processes. Burlingame, California, USA. July 16–18, 2013. V001T04A010. ASME. https://doi.org/10.1115/IPACK2013-73161
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