Heterogeneous integration in microelectronic systems using interposer technology has attracted significant research attention in the past few years. Interposer technology is based on stacking of several heterogeneous chips on a common carrier substrate, also referred to as the interposer. Compared to other technologies such as System-on-Chip (SoC) or System-in-Package (SiP), interposer-based integration offers several technological advantages. However, the thermal management of an interposer-based system is not well understood. The presence of multiple heat sources in various die and the interposer itself needs to be accounted for in any effective thermal model. While a finite-element based simulation may provide a reasonable temperature prediction tool, an analytical solution is highly desirable for understanding the fundamentals of the heat transfer process in interposers. In this paper, we describe our recent work on analytical modeling of heat transfer in interposer-based microelectronic systems. The basic governing energy conservation equations are solved to derive analytical expressions for the temperature distribution in an interposer-based microelectronic system. These solutions are combined with an iterative approach to provide the three-dimensional temperature field in an interposer. Results are in excellent agreement with finite-element solutions. The analytical model is utilized to study the effect of various parameters on the temperature field in an interposer system. Results from this work may be helpful in the thermal design of microelectronic systems containing interposers.

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