This paper presents a CMOS stress sensor chip including arrays of piezoresistive sensor elements with high spatial resolution sensitive to the in-plane stress components σxx – σyy and σxy, to the out-of-plane stress σxz and σyz, and to the normal stress sum σΣ = (σxx + σyy)/2 − σzz. For the first time, an application of novel vertical stress sensors is presented, measuring the mechanical stress distributions below electroless nickel (eNi) bumps subject to lateral shear forces and vertical compression. All measured stress values are linearly proportional to the applied forces. The vertical shear stress sensors resolve residual vertical shear stresses of up to 51 MPa in the shear experiments. An adjustable numerical model is established assuming two different Young’s moduli of silicon nitride (SiN) emulating the adhesion between the SiN and eNi. Qualitative agreement of the in-plane stress distributions between experiment and numerical simulation is found in the shear and compression experiments, while good correlation for σΣ is found only for temperature uncompensated stress values in the compression test. The modeling of the absolute values shows differences to the experimental data of about ±30%.
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ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems
July 6–8, 2011
Portland, Oregon, USA
Conference Sponsors:
- Electronic and Photonic Packaging Division
ISBN:
978-0-7918-4461-8
PROCEEDINGS PAPER
Stress Mapping Below Flip-Chip Bumps With High Spatial Resolution Using Piezoresistive CMOS Sensors
Benjamin Lemke,
Benjamin Lemke
IMTEK - University of Freiburg, Freiburg, Germany
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Oliver Paul,
Oliver Paul
IMTEK - University of Freiburg, Freiburg, Germany
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Shankar Ganapathysubramanian,
Shankar Ganapathysubramanian
Intel Corporation, Chandler, AZ
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Patrick Nardi,
Patrick Nardi
Intel Corporation, Chandler, AZ
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Rajashree Baskaran
Rajashree Baskaran
Intel Corporation, Hillsboro, OR
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Benjamin Lemke
IMTEK - University of Freiburg, Freiburg, Germany
Oliver Paul
IMTEK - University of Freiburg, Freiburg, Germany
Shankar Ganapathysubramanian
Intel Corporation, Chandler, AZ
Patrick Nardi
Intel Corporation, Chandler, AZ
Rajashree Baskaran
Intel Corporation, Hillsboro, OR
Paper No:
IPACK2011-52124, pp. 35-44; 10 pages
Published Online:
February 14, 2012
Citation
Lemke, B, Paul, O, Ganapathysubramanian, S, Nardi, P, & Baskaran, R. "Stress Mapping Below Flip-Chip Bumps With High Spatial Resolution Using Piezoresistive CMOS Sensors." Proceedings of the ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems. ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 1. Portland, Oregon, USA. July 6–8, 2011. pp. 35-44. ASME. https://doi.org/10.1115/IPACK2011-52124
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