The aggressive miniaturization trend in microelectronic design has pushed the transistor gate length to a range of hundreds of nanometers. The study of heat transport and dissipation at the device level is becoming an important part of the overall thermal design. In general, temperature non-uniformity peaks in the transistor drain region due to the higher electric potential field and electron thermalization close to the drain. Drastic changes in both electrical current flow and the thermal heat flow to the heat sink can be caused by this localized temperature non-uniformity. Ballistic transport that happens when gate length approaches the phonon mean free path re-shapes the temperature distribution. Extensive theoretical studies have been done in this area during the past several years [1–3], but no direct experimental observation has yet been reported. The main challenge is the possibility to detect electron and/or lattice temperatures in sub micron ranges. In this paper, we measure the surface temperature distribution of a 180nm gate length silicon MOSFET (Metal Oxide Semiconductor Field Effect Transistor) at both ambient and cryogenic temperatures (10K). The purpose of cryogenic measurement is that the temperature distribution is significantly modified due to much longer phonon ballistic transport as well as possible thermal resistance change. We used thermoreflectance imaging to measure the surface temperature with 100’s nm spatial resolution and 0.1C° temperature resolution [4]. Thermoreflectance is a non-contact, nondestructive thermal characterization technique which is suitable for small scale, high precision measurements. A cryostat is used to keep the sample cold during experiment. The sample chamber is also kept at high vacuum condition (< 1e−5 torr) to prevent condensation and heat loss through air convection. Preliminary results show qualitative changes in the temperature distribution.

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