Due to shrinking feature size and increasing transistor density, combined with the performance demanded from next-generation microprocessors, on-chip hot spots, with their associated high heat fluxes and sharp temperature gradients, have emerged as the primary driver for thermal management of today’s IC technology. This paper describes the novel use of thermoelectric coolers for on-chip hot spot cooling through the use of a copper mini-contact pad, which connects the thermoelectric cooler and the silicon chip thus concentrating the thermoelectric cooling power. A package-level numerical simulation is developed to predict the local on-chip hot spot cooling performance which can be achieved with such mini-contacts. Attention is focused on the hot spot temperature reduction associated with variations in mini-contact size and the thermoelectric element thickness, as well as the parasitic effect of the thermal contact resistance introduced by the mini-contact enhanced TEC. This numerical model and simulation results are validated by comparison to spot cooling experiments with a uniformly heated chip serving as the test vehicle. The experimental results demonstrate that a copper mini-contact pad can improve spot cooling performance by 80 ∼ 115% on a 500μm thick silicon chip under optimum operating conditions and that larger power dissipation on the chip leads to better spot cooling performance.

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