Power dissipation for chip scale atomic clocks (CSAC) is one of the major design considerations. 12 mW of the 30 mW power budget is for temperature control of the vertical-cavity surface-emitting laser (VCSEL) and the alkali-metal vapor cell, each must be maintained at 70±0.1°C even over large ambient temperature variations of 0°C to 50°C. The physics package of a CSAC device is composed of the cell, VCSEL and optical components. This package is heated to 70±0.1°C, but must be very well insulated to dissipate less than 12 mW. To create such a high level of insulation the physics package is enclosed in a gold coated vacuum package and is suspended on a specially designed Cirlex structure. The thermal performance of the suspended physics package has been evaluated by measuring the total thermal resistance from a mockup package with and without an enclosure. Without and enclosure the resistance was found to be 1.07°C/mW. With the enclosure the resistance increases to 1.71°C/mW. These two cases were modeled using FEA, which was found to match well. A FEA model of the real design of the enclosed, suspended physics package was then modeled an was found to have a thermal resistance of 6.28°C/mW, which meets the project requirements. The structural performance of the physics package was measured by shock testing the physics package mockup and recording the response with a high speed video camera. The shock testes were modeled using dynamic FEA and were found to match the measured displacements well. A FEA model of the real design of the physics package was created and it was found that the package will survive an 1800 g shock of any duration in any direction without exceeding the Cirlex yield stress, 49 MPa. In addition the package will survive a 10,000 g shock of any duration in any direction without exceeding the Cirlex tensile stress, 229 MPa.
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Thermal and Structural Analysis of a Suspended Physics Package for a Chip-Scale Atomic Clock
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Laws, AD, & Lee, YC. "Thermal and Structural Analysis of a Suspended Physics Package for a Chip-Scale Atomic Clock." Proceedings of the ASME 2007 InterPACK Conference collocated with the ASME/JSME 2007 Thermal Engineering Heat Transfer Summer Conference. ASME 2007 InterPACK Conference, Volume 1. Vancouver, British Columbia, Canada. July 8–12, 2007. pp. 953-962. ASME. https://doi.org/10.1115/IPACK2007-33013
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