Impact of Thermal Sub-Continuum Effects on Electrical Performance of Silicon-on-Insulator Transistors

In this manuscript, the impact of scaling on self-heating of silicon-on-insulator (SOI) transistors is investigated. Effect of temperature dependent phonon-boundary scattering in silicon thin films, which results in reduction in thermal conduction in the channel region, is incorporated into a electro-thermal simulation tool. Results of DC electro-thermal simulations are used to study drain current degradation due to self-heating and to obtain the thermal resistance of SOI devices as a function of gate length and silicon layer thickness. The device thermal resistance is increased by nearly a factor of 3 due to the scaling of gate length from 180nm to 10nm. Self-heating in SOI devices with gate length of 10nm can be responsible for up to 30% reduction in the saturation current and neglecting phonon-boundary scattering in the channel region may underestimate the degradation of drain current due to self-heating by nearly a factor of two.