System-in-package (SiP) technologies typically demand an increasing number of passive components assembled into a single package to achieve system level electrical performance. Traditionally, these passive components and their assembly technologies are designed for printed circuit boards and are now integrated at the package level. However, problems may arise when solder joints are used as interconnects between the passive components and the substrate in SiP system. The solder joint may melt during the surface mounting process. Since the size of the solder joint is comparable to that of the passive components, the melting may significantly alter the stress field in the package. Consequent failure may occur if the interconnect structure is not properly designed. It is a challenge to simulate solder melting with commercial finite element codes. In this paper, the interaction between the melting solder and the surrounding structures is investigated. The stress superposition method is used in the finite element model, in which the melting solder is removed from the package and a void with identical geometry was analyzed in its place. The overall stress field is the superposition of the stress field due to temperature change and the stress field caused by the uniform pressure acting on the void surface. This method greatly simplifies the mechanical modeling.

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