The memory storage technology revolution has taken the consumer electronics by a storm in just two years. The volatile memory Dynamic Random Access Memory (DRAM) for PC and notebook computing and gaming are increasing in density and speed. With all these improvement, the memory device packaging technology is also evolving rapidly, from the leadframe packages to BGA packages [2]. Under high frequency operation, the parasitics associated with package will significantly degrade the package performance. The DRAM packages are used primarily in the fabrication of DIMM modules that are inserted to the motherboards in PC and notebook computers. With newer DRAM technology in double date rate (DDR) and its second generation, DDR2, to be deployed just two years, it has higher clock rate and I/O number. Packages therefore are changing form the leadframe TSOP type 2 to faster CSPs such as fine pitch BGA (FBGA) and chip on substrate BGA (COSBGA). This paper is focused the COSBGA package [3,4]. In this paper, the packages electrical model have been established and performs signal integrity (SI) simulation. The COSBGA has smallest parasitics when comparison with other two packages. This paper also compares the performance of the COSBGA, TFBGA and TSOPII from crosstalk noise, time skew, insertion loss and return loss for IC designer reference.
Skip Nav Destination
ASME 2005 Pacific Rim Technical Conference and Exhibition on Integration and Packaging of MEMS, NEMS, and Electronic Systems collocated with the ASME 2005 Heat Transfer Summer Conference
July 17–22, 2005
San Francisco, California, USA
Conference Sponsors:
- Heat Transfer Division and Electronic and Photonic Packaging Division
ISBN:
0-7918-4200-2
PROCEEDINGS PAPER
DDRII Memory Packages Electrical Performance Comparison of COSBGA, TFBGA, and Standard TSOPII Available to Purchase
Bryan Hsieh,
Bryan Hsieh
Siliconware Precision Industries Company, Ltd., Taichung, Taiwan
Search for other works by this author on:
Kevin Chiang,
Kevin Chiang
Siliconware Precision Industries Company, Ltd., Taichung, Taiwan
Search for other works by this author on:
Y. P. Wang,
Y. P. Wang
Siliconware Precision Industries Company, Ltd., Taichung, Taiwan
Search for other works by this author on:
C. S. Hsiao
C. S. Hsiao
Siliconware Precision Industries Company, Ltd., Taichung, Taiwan
Search for other works by this author on:
Bryan Hsieh
Siliconware Precision Industries Company, Ltd., Taichung, Taiwan
Kevin Chiang
Siliconware Precision Industries Company, Ltd., Taichung, Taiwan
Y. P. Wang
Siliconware Precision Industries Company, Ltd., Taichung, Taiwan
C. S. Hsiao
Siliconware Precision Industries Company, Ltd., Taichung, Taiwan
Paper No:
IPACK2005-73200, pp. 1063-1068; 6 pages
Published Online:
March 4, 2009
Citation
Hsieh, B, Chiang, K, Wang, YP, & Hsiao, CS. "DDRII Memory Packages Electrical Performance Comparison of COSBGA, TFBGA, and Standard TSOPII." Proceedings of the ASME 2005 Pacific Rim Technical Conference and Exhibition on Integration and Packaging of MEMS, NEMS, and Electronic Systems collocated with the ASME 2005 Heat Transfer Summer Conference. Advances in Electronic Packaging, Parts A, B, and C. San Francisco, California, USA. July 17–22, 2005. pp. 1063-1068. ASME. https://doi.org/10.1115/IPACK2005-73200
Download citation file:
11
Views
Related Proceedings Papers
An Yield Model for Electronics Assembly
IMECE2005
Related Articles
Special Issue on InterPACK2022
J. Electron. Packag (December,2023)
Three-Dimensional Effects of Solder Joints in Micro-Scale BGA Assembly
J. Electron. Packag (December,1999)
Nonlinear Analysis of Full-Matrix and Perimeter Plastic Ball Grid Array Solder Joints
J. Electron. Packag (September,1997)
Related Chapters
An Age Based Dynamic Respect Factor for Pedestrian Dynamics
International Conference on Computer Technology and Development, 3rd (ICCTD 2011)
Modeling of the Processes in the Airport Area (PSAM-0468)
Proceedings of the Eighth International Conference on Probabilistic Safety Assessment & Management (PSAM)
Case Study: Simulation Analysis for Complex R&D Project Based on Iteration Process Model
International Conference on Instrumentation, Measurement, Circuits and Systems (ICIMCS 2011)