A solution space design methodology is presented for optimization of off-chip inductors. The analysis has been performed for an advanced wafer level redistribution manufacturing process. Electromagnetic simulations were performed to extract the characteristics of different inductor designs. It was observed that the design optimization should be tuned to the operating frequency.

Volume Subject Area:
Embedded Passives
Topics:
Design, Inductors, Optimization, Design methodology, Engineering simulation, Manufacturing, Semiconductor wafers, Simulation
This content is only available via PDF.
Copyright © 2003
 by ASME
You do not currently have access to this content.